Révision 191
Ajouté par sabeaussan il y a plus de 6 ans
| conf_noyau.cfg | ||
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initial_start = ON;
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exinf = 0x0;
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};
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task[]{
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entry_address = periph_rx();
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name = ID_periph_rx;
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entry_address = ctrl_t();
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name = ID_ctrlt;
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stack_size = 256;
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stack_section = stack;
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priority = 2;
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priority = 4;
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initial_start = OFF;
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exinf = 0x0;
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};
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task[]{
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entry_address = ctrl_t();
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name = ID_ctrlt;
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entry_address = asserv_vitesse();
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name = ID_asserv_v;
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stack_size = 256;
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stack_section = stack;
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priority = 3;
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| ... | ... | |
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};
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task[]{
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entry_address = periph_rx();
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name = ID_periph_rx;
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stack_size = 256;
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stack_section = stack;
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priority = 2;
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initial_start = OFF;
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exinf = 0x0;
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};
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flag[]{
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name = ev_bus_fin_tr;
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initial_pattern = 0x0000;
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| ... | ... | |
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};
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cyclic_hand[]{
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entry_address = acqui();
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name = ID_acqui;
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Formats disponibles : Unified diff
asserv + circuit R et B ok