Index: branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/TPSP4c1.c
===================================================================
--- branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/TPSP4c1.c	(nonexistent)
+++ branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/TPSP4c1.c	(revision 771)
@@ -0,0 +1,17 @@
+/***********************************************************************/
+/*                                                                     */
+/*  FILE        :TPSP4c1.c                                             */
+/*  DATE        :Thu, Jun 03, 2021                                     */
+/*  DESCRIPTION :main program file.                                    */
+/*  CPU GROUP   :87B                                                   */
+/*                                                                     */
+/*  This file is generated by Renesas Project Generator (Ver.4.18).    */
+/*  NOTE:THIS IS A TYPICAL EXAMPLE.                                    */
+/***********************************************************************/
+
+
+
+void main(void)
+{
+	
+}
Index: branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/sect308.inc
===================================================================
--- branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/sect308.inc	(nonexistent)
+++ branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/sect308.inc	(revision 771)
@@ -0,0 +1,783 @@
+;*******************************************************************************
+;
+;     C Compiler for M16C/80
+; Copyright (C) 1999 (2000 - 2010) Renesas Electronics Corporation.
+; and Renesas Solutions Corporation. All rights reserved.
+;
+;
+;     sect30.inc     : section definition
+;     This program is applicable when using the basic I/O library
+;
+;     $Date: 2005/10/12 07:54:36 $
+;     $Revision: 1.24 $
+;
+;******************************************************************************
+;---------------------------------------------------------------
+;
+; 	Arrangement of section
+;
+;---------------------------------------------------------------
+; Near RAM data area
+;---------------------------------------------------------------
+; SBDATA area
+	.section	data_SE,DATA
+	.org	400H
+data_SE_top:
+; for NSD
+	.section	data_MON1_SE,DATA
+data_MON1_SE_top:
+	.section	data_MON2_SE,DATA
+data_MON2_SE_top:
+	.section	data_MON3_SE,DATA
+data_MON3_SE_top:
+	.section	data_MON4_SE,DATA
+data_MON4_SE_top:
+
+	.section	bss_SE,DATA,ALIGN
+bss_SE_top:
+; for NSD
+	.section	bss_MON1_SE,DATA,ALIGN
+bss_MON1_SE_top:
+	.section	bss_MON2_SE,DATA,ALIGN
+bss_MON2_SE_top:
+	.section	bss_MON3_SE,DATA,ALIGN
+bss_MON3_SE_top:
+	.section	bss_MON4_SE,DATA,ALIGN
+bss_MON4_SE_top:
+
+	.section	data_SO,DATA
+data_SO_top:
+; for NSD
+	.section	data_MON1_SO,DATA
+data_MON1_SO_top:
+	.section	data_MON2_SO,DATA
+data_MON2_SO_top:
+	.section	data_MON3_SO,DATA
+data_MON3_SO_top:
+	.section	data_MON4_SO,DATA
+data_MON4_SO_top:
+
+	.section	bss_SO,DATA
+bss_SO_top:
+; for NSD
+	.section	bss_MON1_SO,DATA
+bss_MON1_SO_top:
+	.section	bss_MON2_SO,DATA
+bss_MON2_SO_top:
+	.section	bss_MON3_SO,DATA
+bss_MON3_SO_top:
+	.section	bss_MON4_SO,DATA
+bss_MON4_SO_top:
+
+; near RAM area
+	.section	data_NE,DATA,ALIGN
+data_NE_top:
+; for NSD
+	.section	data_MON1_E,DATA,ALIGN
+data_MON1_E_top:
+	.section	data_MON2_E,DATA,ALIGN
+data_MON2_E_top:
+	.section	data_MON3_E,DATA,ALIGN
+data_MON3_E_top:
+	.section	data_MON4_E,DATA,ALIGN
+data_MON4_E_top:
+
+	.section	bss_NE,DATA,ALIGN
+bss_NE_top:
+; for NSD
+	.section	bss_MON1_E,DATA,ALIGN
+bss_MON1_E_top:
+	.section	bss_MON2_E,DATA,ALIGN
+bss_MON2_E_top:
+	.section	bss_MON3_E,DATA,ALIGN
+bss_MON3_E_top:
+	.section	bss_MON4_E,DATA,ALIGN
+bss_MON4_E_top:
+
+	.section	data_NO,DATA
+data_NO_top:
+; for NSD
+	.section	data_MON1_O,DATA
+data_MON1_O_top:
+	.section	data_MON2_O,DATA
+data_MON2_O_top:
+	.section	data_MON3_O,DATA
+data_MON3_O_top:
+	.section	data_MON4_O,DATA
+data_MON4_O_top:
+
+	.section	bss_NO,DATA
+bss_NO_top:
+; for NSD
+	.section	bss_MON1_O,DATA
+bss_MON1_O_top:
+	.section	bss_MON2_O,DATA
+bss_MON2_O_top:
+	.section	bss_MON3_O,DATA
+bss_MON3_O_top:
+	.section	bss_MON4_O,DATA
+bss_MON4_O_top:
+
+;---------------------------------------------------------------
+; Stack area
+;---------------------------------------------------------------
+	.section	stack,DATA,ALIGN
+	.blkb	STACKSIZE
+	.align
+stack_top:
+
+	.blkb	ISTACKSIZE
+	.align
+istack_top:
+
+
+;---------------------------------------------------------------
+;	heap section
+;---------------------------------------------------------------
+.if __HEAP__ != 1
+	.section	heap,DATA
+heap_top:
+	.blkb	HEAPSIZE
+.endif
+
+;---------------------------------------------------------------
+; Near ROM data area
+;---------------------------------------------------------------
+	.section	rom_NE,ROMDATA,ALIGN
+rom_NE_top:
+
+	.section	rom_NO,ROMDATA
+rom_NO_top:
+
+;---------------------------------------------------------------
+; Far RAM data area
+;---------------------------------------------------------------
+; SBDATA area for #pragma SB16DATA
+;	.section	data_SE,DATA
+;	.org		10000H
+;data_SE_top:
+; for NSD
+;	.section	data_MON1_SE,DATA
+;data_MON1_SE_top:
+;	.section	data_MON2_SE,DATA
+;data_MON2_SE_top:
+;	.section	data_MON3_SE,DATA
+;data_MON3_SE_top:
+;	.section	data_MON4_SE,DATA
+;data_MON4_SE_top:
+;
+;	.section	bss_SE,DATA,ALIGN
+;bss_SE_top:
+; for NSD
+;	.section	bss_MON1_SE,DATA,ALIGN
+;bss_MON1_SE_top:
+;	.section	bss_MON2_SE,DATA,ALIGN
+;bss_MON2_SE_top:
+;	.section	bss_MON3_SE,DATA,ALIGN
+;bss_MON3_SE_top:
+;	.section	bss_MON4_SE,DATA,ALIGN
+;bss_MON4_SE_top:
+;
+;	.section	data_SO,DATA
+;data_SO_top:
+; for NSD
+;	.section	data_MON1_SO,DATA
+;data_MON1_SO_top:
+;	.section	data_MON2_SO,DATA
+;data_MON2_SO_top:
+;	.section	data_MON3_SO,DATA
+;data_MON3_SO_top:
+;	.section	data_MON4_SO,DATA
+;data_MON4_SO_top:
+;
+;	.section	bss_SO,DATA
+;bss_SO_top:
+; for NSD
+;	.section	bss_MON1_SO,DATA
+;bss_MON1_SO_top:
+;	.section	bss_MON2_SO,DATA
+;bss_MON2_SO_top:
+;	.section	bss_MON3_SO,DATA
+;bss_MON3_SO_top:
+;	.section	bss_MON4_SO,DATA
+;bss_MON4_SO_top:
+;
+;	.section	data_6E,DATA,ALIGN
+;data_6E_top:
+; for NSD
+;	.section	data_MON1_6E,DATA,ALIGN
+;data_MON1_6E_top:
+;	.section	data_MON2_6E,DATA,ALIGN
+;data_MON2_6E_top:
+;	.section	data_MON3_6E,DATA,ALIGN
+;data_MON3_6E_top:
+;	.section	data_MON4_6E,DATA,ALIGN
+;data_MON4_6E_top:
+;
+;	.section	bss_6E,DATA,ALIGN
+;bss_6E_top:
+; for NSD
+;	.section	bss_MON1_6E,DATA,ALIGN
+;bss_MON1_6E_top:
+;	.section	bss_MON2_6E,DATA,ALIGN
+;bss_MON2_6E_top:
+;	.section	bss_MON3_6E,DATA,ALIGN
+;bss_MON3_6E_top:
+;	.section	bss_MON4_6E,DATA,ALIGN
+;bss_MON4_6E_top:
+;
+;	.section	data_6O,DATA
+;data_6O_top:
+; for NSD
+;	.section	data_MON1_6O,DATA
+;data_MON1_6O_top:
+;	.section	data_MON2_6O,DATA
+;data_MON2_6O_top:
+;	.section	data_MON3_6O,DATA
+;data_MON3_6O_top:
+;	.section	data_MON4_6O,DATA
+;data_MON4_6O_top:
+;
+;	.section	bss_6O,DATA
+;bss_6O_top:
+; for NSD
+;	.section	bss_MON1_6O,DATA
+;bss_MON1_6O_top:
+;	.section	bss_MON2_6O,DATA
+;bss_MON2_6O_top:
+;	.section	bss_MON3_6O,DATA
+;bss_MON3_6O_top:
+;	.section	bss_MON4_6O,DATA
+;bss_MON4_6O_top:
+;
+	.section	data_FE,DATA
+	.org		20000H
+data_FE_top:
+; for NSD
+;	.section	data_MON1_E,DATA
+;data_MON1_E_top:
+;	.section	data_MON2_E,DATA
+;data_MON2_E_top:
+;	.section	data_MON3_E,DATA
+;data_MON3_E_top:
+;	.section	data_MON4_E,DATA
+;data_MON4_E_top:
+
+	.section	bss_FE,DATA,ALIGN
+bss_FE_top:
+; for NSD
+;	.section	bss_MON1_E,DATA,ALIGN
+;bss_MON1_E_top:
+;	.section	bss_MON2_E,DATA,ALIGN
+;bss_MON2_E_top:
+;	.section	bss_MON3_E,DATA,ALIGN
+;bss_MON3_E_top:
+;	.section	bss_MON4_E,DATA,ALIGN
+;bss_MON4_E_top:
+ 
+	.section	data_FO,DATA
+data_FO_top:
+; for NSD
+;	.section	data_MON1_O,DATA
+;data_MON1_O_top:
+;	.section	data_MON2_O,DATA
+;data_MON2_O_top:
+;	.section	data_MON3_O,DATA
+;data_MON3_O_top:
+;	.section	data_MON4_O,DATA
+;data_MON4_O_top:
+ 
+	.section	bss_FO,DATA
+bss_FO_top:
+; for NSD
+;	.section	bss_MON1_O,DATA
+;bss_MON1_O_top:
+;	.section	bss_MON2_O,DATA
+;bss_MON2_O_top:
+;	.section	bss_MON3_O,DATA
+;bss_MON3_O_top:
+;	.section	bss_MON4_O,DATA
+;bss_MON4_O_top:
+
+
+;---------------------------------------------------------------
+; Far ROM data area
+;---------------------------------------------------------------
+	.section	rom_FE,ROMDATA
+	.org		0FE0000H
+rom_FE_top:
+
+	.section	rom_FO,ROMDATA
+rom_FO_top:
+
+;---------------------------------------------------------------
+; Initial data of 'data' section
+;---------------------------------------------------------------
+	.section	data_SEI,ROMDATA
+data_SEI_top:
+; for NSD
+	.section	data_MON1_SEI,ROMDATA
+data_MON1_SEI_top:
+	.section	data_MON2_SEI,ROMDATA
+data_MON2_SEI_top:
+	.section	data_MON3_SEI,ROMDATA
+data_MON3_SEI_top:
+	.section	data_MON4_SEI,ROMDATA
+data_MON4_SEI_top:
+
+	.section	data_SOI,ROMDATA
+data_SOI_top:
+; for NSD
+	.section	data_MON1_SOI,ROMDATA
+data_MON1_SOI_top:
+	.section	data_MON2_SOI,ROMDATA
+data_MON2_SOI_top:
+	.section	data_MON3_SOI,ROMDATA
+data_MON3_SOI_top:
+	.section	data_MON4_SOI,ROMDATA
+data_MON4_SOI_top:
+
+;	.section	data_6EI,ROMDATA
+;data_6EI_top:
+; for NSD
+;	.section	data_MON1_6EI,ROMDATA
+;data_MON1_6EI_top:
+;	.section	data_MON2_6EI,ROMDATA
+;data_MON2_6EI_top:
+;	.section	data_MON3_6EI,ROMDATA
+;data_MON3_6EI_top:
+;	.section	data_MON4_6EI,ROMDATA
+;data_MON4_6EI_top:
+;
+;	.section	data_6OI,ROMDATA
+;data_6OI_top:
+; for NSD
+;	.section	data_MON1_6OI,ROMDATA
+;data_MON1_6OI_top:
+;	.section	data_MON2_6OI,ROMDATA
+;data_MON2_6OI_top:
+;	.section	data_MON3_6OI,ROMDATA
+;data_MON3_6OI_top:
+;	.section	data_MON4_6OI,ROMDATA
+;data_MON4_6OI_top:
+
+	.section	data_NEI,ROMDATA
+data_NEI_top:
+; for NSD
+	.section	data_MON1_EI,ROMDATA
+data_MON1_EI_top:
+	.section	data_MON2_EI,ROMDATA
+data_MON2_EI_top:
+	.section	data_MON3_EI,ROMDATA
+data_MON3_EI_top:
+	.section	data_MON4_EI,ROMDATA
+data_MON4_EI_top:
+ 
+	.section	data_NOI,ROMDATA
+data_NOI_top:
+; for NSD
+	.section	data_MON1_OI,ROMDATA
+data_MON1_OI_top:
+	.section	data_MON2_OI,ROMDATA
+data_MON2_OI_top:
+	.section	data_MON3_OI,ROMDATA
+data_MON3_OI_top:
+	.section	data_MON4_OI,ROMDATA
+data_MON4_OI_top:
+ 
+	.section	data_FEI,ROMDATA
+data_FEI_top:
+; for NSD
+;	.section	data_MON1_EI,ROMDATA
+;data_MON1_EI_top:
+;	.section	data_MON2_EI,ROMDATA
+;data_MON2_EI_top:
+;	.section	data_MON3_EI,ROMDATA
+;data_MON3_EI_top:
+;	.section	data_MON4_EI,ROMDATA
+;data_MON4_EI_top:
+ 
+	.section	data_FOI,ROMDATA
+data_FOI_top:
+; for NSD
+;	.section	data_MON1_OI,ROMDATA
+;data_MON1_OI_top:
+;	.section	data_MON2_OI,ROMDATA
+;data_MON2_OI_top:
+;	.section	data_MON3_OI,ROMDATA
+;data_MON3_OI_top:
+;	.section	data_MON4_OI,ROMDATA
+;data_MON4_OI_top:
+
+;---------------------------------------------------------------
+; code area
+;---------------------------------------------------------------
+	.section	interrupt,ALIGN
+
+	.section	program,ALIGN
+
+	.section	program_S
+	.org		0FF0000H
+
+
+;---------------------------------------------------------------
+; variable vector section
+;---------------------------------------------------------------
+	.section	vector,ROMDATA		; variable vector table
+	.org	VECTOR_ADR 
+.if	__MVT__ == 0
+	.lword	dummy_int		; BRK (software int 0)
+	.lword	dummy_int		; 
+	.lword	dummy_int		; 
+	.lword	dummy_int		; 
+	.lword	dummy_int		; 
+	.lword	dummy_int		; 
+	.lword	dummy_int		; 
+	.lword	dummy_int		; 
+	.lword	dummy_int		; DMA0 (software int 8)
+	.lword	dummy_int 		; DMA1 (software int 9)
+	.lword	dummy_int 		; DMA2 (software int 10)
+	.lword	dummy_int 		; DMA3 (software int 11)
+	.lword	dummy_int		; TIMER A0 (software int 12)
+	.lword	dummy_int		; TIMER A1 (software int 13)
+	.lword	dummy_int		; TIMER A2 (software int 14)
+	.lword	dummy_int		; TIMER A3 (software int 15)
+	.lword	dummy_int		; TIMER A4 (software int 16)
+	.lword	dummy_int		; uart0 trance (software int 17)
+	.lword	dummy_int		; uart0 receive (software int 18)
+	.lword	dummy_int		; uart1 trance (software int 19)
+	.lword	dummy_int		; uart1 receive (software int 20)
+	.lword	dummy_int		; TIMER B0 (software int 21)
+	.lword	dummy_int		; TIMER B1 (software int 22)
+	.lword	dummy_int		; TIMER B2 (software int 23)
+	.lword	dummy_int		; TIMER B3 (software int 24)
+	.lword	dummy_int		; TIMER B4 (software int 25)
+	.lword	dummy_int		; INT5 (software int 26)
+	.lword	dummy_int		; INT4 (software int 27)
+	.lword	dummy_int		; INT3 (software int 28)
+	.lword	dummy_int		; INT2 (software int 29)
+	.lword	dummy_int		; INT1 (software int 30)
+	.lword	dummy_int		; INT0 (software int 31)
+	.lword	dummy_int		; TIMER B5 (software int 32)
+	.lword	dummy_int		; uart2 trance/NACK (software int 33)
+	.lword	dummy_int		; uart2 receive/ACK (software int 34)
+	.lword	dummy_int		; uart3 trance/NACK (software int 35)
+	.lword	dummy_int		; uart3 receive/ACK (software int 36)
+	.lword	dummy_int		; uart4 trance/NACK (software int 37)
+	.lword	dummy_int		; uart4 receive/ACK (software int 38)
+	.lword	dummy_int		; uart2 bus collision (software int 39)
+	.lword	dummy_int		; uart3 bus collision (software int 40)
+	.lword	dummy_int		; uart4 bus collision (software int 41)
+	.lword	dummy_int		; A-D Convert (software int 42)
+	.lword	dummy_int		; input key (software int 43)
+	.lword	dummy_int		; software int 44
+	.lword	dummy_int		; software int 45
+	.lword	dummy_int		; software int 46
+	.lword	dummy_int		; software int 47
+	.lword	dummy_int		; software int 48
+	.lword	dummy_int		; software int 49
+	.lword	dummy_int		; software int 50
+	.lword	dummy_int		; software int 51
+	.lword	dummy_int		; software int 52
+	.lword	dummy_int		; software int 53
+	.lword	dummy_int		; software int 54
+	.lword	dummy_int		; software int 55
+	.lword	dummy_int		; software int 56
+	.lword	dummy_int		; software int 57
+	.lword	dummy_int		; software int 58
+	.lword	dummy_int		; software int 59
+	.lword	dummy_int		; software int 60
+	.lword	dummy_int		; software int 61
+	.lword	dummy_int		; software int 62
+	.lword	dummy_int		; software int 63
+.endif	; __MVT__
+
+
+;===============================================================
+; fixed vector section
+;---------------------------------------------------------------
+	.section	svector,ROMDATA		; specialpage vector table
+.if	__MST__ == 0	
+	.org		SVECTOR_ADR
+;===============================================================
+; special page defination
+;---------------------------------------------------------------
+;	macro is defined in ncrt0.a30
+;	Format: SPECIAL number
+;
+;---------------------------------------------------------------
+;	SPECIAL 255
+;	SPECIAL 254
+;	SPECIAL 253
+;	SPECIAL 252
+;	SPECIAL 251
+;	SPECIAL 250
+;	SPECIAL 249
+;	SPECIAL 248
+;	SPECIAL 247
+;	SPECIAL 246
+;	SPECIAL 245
+;	SPECIAL 244
+;	SPECIAL 243
+;	SPECIAL 242
+;	SPECIAL 241
+;	SPECIAL 240
+;	SPECIAL 239
+;	SPECIAL 238
+;	SPECIAL 237
+;	SPECIAL 236
+;	SPECIAL 235
+;	SPECIAL 234
+;	SPECIAL 233
+;	SPECIAL 232
+;	SPECIAL 231
+;	SPECIAL 230
+;	SPECIAL 229
+;	SPECIAL 228
+;	SPECIAL 227
+;	SPECIAL 226
+;	SPECIAL 225
+;	SPECIAL 224
+;	SPECIAL 223
+;	SPECIAL 222
+;	SPECIAL 221
+;	SPECIAL 220
+;	SPECIAL 219
+;	SPECIAL 218
+;	SPECIAL 217
+;	SPECIAL 216
+;	SPECIAL 215
+;	SPECIAL 214
+;	SPECIAL 213
+;	SPECIAL 212
+;	SPECIAL 211
+;	SPECIAL 210
+;	SPECIAL 209
+;	SPECIAL 208
+;	SPECIAL 207
+;	SPECIAL 206
+;	SPECIAL 205
+;	SPECIAL 204
+;	SPECIAL 203
+;	SPECIAL 202
+;	SPECIAL 201
+;	SPECIAL 200
+;	SPECIAL 199
+;	SPECIAL 198
+;	SPECIAL 197
+;	SPECIAL 196
+;	SPECIAL 195
+;	SPECIAL 194
+;	SPECIAL 193
+;	SPECIAL 192
+;	SPECIAL 191
+;	SPECIAL 190
+;	SPECIAL 189
+;	SPECIAL 188
+;	SPECIAL 187
+;	SPECIAL 186
+;	SPECIAL 185
+;	SPECIAL 184
+;	SPECIAL 183
+;	SPECIAL 182
+;	SPECIAL 181
+;	SPECIAL 180
+;	SPECIAL 179
+;	SPECIAL 178
+;	SPECIAL 177
+;	SPECIAL 176
+;	SPECIAL 175
+;	SPECIAL 174
+;	SPECIAL 173
+;	SPECIAL 172
+;	SPECIAL 171
+;	SPECIAL 170
+;	SPECIAL 169
+;	SPECIAL 168
+;	SPECIAL 167
+;	SPECIAL 166
+;	SPECIAL 165
+;	SPECIAL 164
+;	SPECIAL 163
+;	SPECIAL 162
+;	SPECIAL 161
+;	SPECIAL 160
+;	SPECIAL 159
+;	SPECIAL 158
+;	SPECIAL 157
+;	SPECIAL 156
+;	SPECIAL 155
+;	SPECIAL 154
+;	SPECIAL 153
+;	SPECIAL 152
+;	SPECIAL 151
+;	SPECIAL 150
+;	SPECIAL 149
+;	SPECIAL 148
+;	SPECIAL 147
+;	SPECIAL 146
+;	SPECIAL 145
+;	SPECIAL 144
+;	SPECIAL 143
+;	SPECIAL 142
+;	SPECIAL 141
+;	SPECIAL 140
+;	SPECIAL 139
+;	SPECIAL 138
+;	SPECIAL 137
+;	SPECIAL 136
+;	SPECIAL 135
+;	SPECIAL 134
+;	SPECIAL 133
+;	SPECIAL 132
+;	SPECIAL 131
+;	SPECIAL 130
+;	SPECIAL 129
+;	SPECIAL 128
+;	SPECIAL 127
+;	SPECIAL 126
+;	SPECIAL 125
+;	SPECIAL 124
+;	SPECIAL 123
+;	SPECIAL 122
+;	SPECIAL 121
+;	SPECIAL 120
+;	SPECIAL 119
+;	SPECIAL 118
+;	SPECIAL 117
+;	SPECIAL 116
+;	SPECIAL 115
+;	SPECIAL 114
+;	SPECIAL 113
+;	SPECIAL 112
+;	SPECIAL 111
+;	SPECIAL 110
+;	SPECIAL 109
+;	SPECIAL 108
+;	SPECIAL 107
+;	SPECIAL 106
+;	SPECIAL 105
+;	SPECIAL 104
+;	SPECIAL 103
+;	SPECIAL 102
+;	SPECIAL 101
+;	SPECIAL 100
+;	SPECIAL 99
+;	SPECIAL 98
+;	SPECIAL 97
+;	SPECIAL 96
+;	SPECIAL 95
+;	SPECIAL 94
+;	SPECIAL 93
+;	SPECIAL 92
+;	SPECIAL 91
+;	SPECIAL 90
+;	SPECIAL 89
+;	SPECIAL 88
+;	SPECIAL 87
+;	SPECIAL 86
+;	SPECIAL 85
+;	SPECIAL 84
+;	SPECIAL 83
+;	SPECIAL 82
+;	SPECIAL 81
+;	SPECIAL 80
+;	SPECIAL 79
+;	SPECIAL 78
+;	SPECIAL 77
+;	SPECIAL 76
+;	SPECIAL 75
+;	SPECIAL 74
+;	SPECIAL 73
+;	SPECIAL 72
+;	SPECIAL 71
+;	SPECIAL 70
+;	SPECIAL 69
+;	SPECIAL 68
+;	SPECIAL 67
+;	SPECIAL 66
+;	SPECIAL 65
+;	SPECIAL 64
+;	SPECIAL 63
+;	SPECIAL 62
+;	SPECIAL 61
+;	SPECIAL 60
+;	SPECIAL 59
+;	SPECIAL 58
+;	SPECIAL 57
+;	SPECIAL 56
+;	SPECIAL 55
+;	SPECIAL 54
+;	SPECIAL 53
+;	SPECIAL 52
+;	SPECIAL 51
+;	SPECIAL 50
+;	SPECIAL 49
+;	SPECIAL 48
+;	SPECIAL 47
+;	SPECIAL 46
+;	SPECIAL 45
+;	SPECIAL 44
+;	SPECIAL 43
+;	SPECIAL 42
+;	SPECIAL 41
+;	SPECIAL 40
+;	SPECIAL 39
+;	SPECIAL 38
+;	SPECIAL 37
+;	SPECIAL 36
+;	SPECIAL 35
+;	SPECIAL 34
+;	SPECIAL 33
+;	SPECIAL 32
+;	SPECIAL 31
+;	SPECIAL 30
+;	SPECIAL 29
+;	SPECIAL 28
+;	SPECIAL 27
+;	SPECIAL 26
+;	SPECIAL 25
+;	SPECIAL 24
+;	SPECIAL 23
+;	SPECIAL 22
+;	SPECIAL 21
+;	SPECIAL 20
+;	SPECIAL 19
+;	SPECIAL 18
+;
+.endif	; __MST__
+
+
+;===============================================================
+; fixed vector section
+;---------------------------------------------------------------
+	.section	fvector,ROMDATA
+	.org	0FFFFDCh
+UDI:
+	.lword	dummy_int
+OVER_FLOW:
+	.lword	dummy_int
+BRKI:
+	.lword	dummy_int
+ADDRESS_MATCH:
+	.lword	dummy_int
+SINGLE_STEP:
+	.lword	dummy_int
+WDT:
+	.lword	dummy_int
+DBC:
+	.lword	dummy_int
+NMI:
+	.lword	dummy_int
+RESET:
+	.lword	start
+;
+;*******************************************************************************
+;
+;     C Compiler for M16C/80
+; Copyright (C) 1999 (2000 - 2010) Renesas Electronics Corporation.
+; and Renesas Solutions Corporation. All rights reserved.
+;
+;
+;*******************************************************************************
+
Index: branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/uart0.h
===================================================================
Index: branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/SessionM32C_Simulator.hsf
===================================================================
--- branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/SessionM32C_Simulator.hsf	(nonexistent)
+++ branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/SessionM32C_Simulator.hsf	(revision 771)
@@ -0,0 +1,72 @@
+[HIMDBVersion]
+2.0
+[DATABASE_VERSION]
+"2.3" 
+[SESSION_DETAILS]
+"" 
+[INFORMATION]
+"" 
+[GENERAL_DATA]
+"RESET_CPU_AFTER_DOWNLOAD_TAG" "VARIANT_TRUE_STORE_TAG" 
+[LANGUAGE]
+"English" 
+[CONFIG_INFO_VD1]
+0 
+[CONFIG_INFO_VD2]
+0 
+[CONFIG_INFO_VD3]
+0 
+[CONFIG_INFO_VD4]
+0 
+[WINDOW_POSITION_STATE_DATA_VD1]
+[WINDOW_POSITION_STATE_DATA_VD2]
+[WINDOW_POSITION_STATE_DATA_VD3]
+[WINDOW_POSITION_STATE_DATA_VD4]
+[WINDOW_Z_ORDER]
+[TARGET_NAME]
+"M32C Simulator" "" 0 
+[STATUSBAR_STATEINFO_VD1]
+"MasterShowState" 1 
+"ApplicationShowState" 1 
+"DebuggerShowState" 1 
+[STATUSBAR_STATEINFO_VD2]
+"MasterShowState" 1 
+"ApplicationShowState" 1 
+"DebuggerShowState" 1 
+[STATUSBAR_STATEINFO_VD3]
+"MasterShowState" 1 
+"ApplicationShowState" 1 
+"DebuggerShowState" 1 
+[STATUSBAR_STATEINFO_VD4]
+"MasterShowState" 1 
+"ApplicationShowState" 1 
+"DebuggerShowState" 1 
+[STATUSBAR_DEBUGGER_PANESTATE_VD1]
+[STATUSBAR_DEBUGGER_PANESTATE_VD2]
+[STATUSBAR_DEBUGGER_PANESTATE_VD3]
+[STATUSBAR_DEBUGGER_PANESTATE_VD4]
+[DEBUGGER_OPTIONS]
+"Unknown Options" 
+[DOWNLOAD_MODULES]
+"$(CONFIGDIR)\$(PROJECTNAME).x30" 0 "IEEE695_RENESAS" 0 0 1 0 
+[CONNECT_ON_GO]
+"FALSE" 
+[DOWNLOAD_MODULES_AFTER_BUILD]
+"TRUE" 
+[REMOVE_BREAKPOINTS_ON_DOWNLOAD]
+"TRUE" 
+[DISABLE_MEMORY_ACCESS_PRIOR_TO_COMMAND_FILE_EXECUTION]
+"FALSE" 
+[LIMIT_DISASSEMBLY_MEMORY_ACCESS]
+"FALSE" 
+[DISABLE_MEMORY_ACCESS_DURING_EXECUTION]
+"FALSE" 
+[DEBUGGER_OPTIONS_PROPERTIES]
+"1" 
+[COMMAND_FILES]
+[DEFAULT_DEBUG_FORMAT]
+"" 
+[FLASH_DETAILS]
+"" 0 0 "" 0 "" 0 0 "" 0 0 0 0 0 0 0 "" "" "" "" "" 
+[BREAKPOINTS]
+[END]
Index: branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/DefaultSession.hsf
===================================================================
--- branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/DefaultSession.hsf	(nonexistent)
+++ branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/DefaultSession.hsf	(revision 771)
@@ -0,0 +1,105 @@
+[HIMDBVersion]
+2.0
+[DATABASE_VERSION]
+"2.3" 
+[SESSION_DETAILS]
+"" 
+[INFORMATION]
+"" 
+[GENERAL_DATA]
+"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlECX_MAP_FIND_SYMBOL_LIST" "" 
+"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlViews" "0" 
+"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBatchFileName" "" 
+"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBreakpointFlag" "-1 " 
+"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBreakpointStatus" "-1 " 
+"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBrowseDirectory" "" 
+"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlLogFileName" "" 
+"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlSplitterPosition" "242" 
+"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlViews" "1" 
+"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlWindowProperties" "17" 
+"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineWndInstanceKey0" "{WK_00000001_CmdLine}" 
+"{313F4FC1-6566-11D5-8BBE-0004E2013C71}TclTkCtrlLogFileName" "" 
+"{6C4D5B81-FD67-46A9-A089-EA44DCDE47FD}RAMMonitorManagerCtrlBlockInfoFileDir" "" 
+"{6C4D5B81-FD67-46A9-A089-EA44DCDE47FD}RAMMonitorManagerCtrlBlockInfoFileName" "" 
+"{7943C44E-7D44-422A-9140-4CF55C88F7D3}DifferenceCtrlViews" "0" 
+[LANGUAGE]
+"English" 
+[CONFIG_INFO_VD1]
+1 
+[CONFIG_INFO_VD2]
+0 
+[CONFIG_INFO_VD3]
+0 
+[CONFIG_INFO_VD4]
+0 
+[WINDOW_POSITION_STATE_DATA_VD1]
+"Help" "TOOLBAR 0" 59419 1 5 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
+"{WK_00000001_CmdLine}" "WINDOW" 59422 0 1 "0.33" 180 0 0 350 200 17 0 "32771|32772|32778|<<separator>>|32773|32774|<<separator>>|32820|<<separator>>|32801|32824" "0.0" 
+"{WK_00000001_OUTPUT}" "WINDOW" 59422 0 0 "1.00" 180 534 287 350 200 18 0 "36756|36757|36758|36759|<<separator>>|36746|36747|<<separator>>|39531|<<separator>>|39500|39534|<<separator>>|36687" "0.0" 
+"{WK_00000002_WORKSPACE}" "WINDOW" 59420 0 0 "1.00" 180 534 287 350 200 18 0 "" "0.0" 
+"{WK_TB00000001_STANDARD}" "TOOLBAR 0" 59419 0 2 "0.00" 0 0 0 0 0 18 0 "" "0.0" 
+"{WK_TB00000002_EDITOR}" "TOOLBAR 0" 59419 0 0 "0.00" 0 0 0 0 0 18 0 "" "0.0" 
+"{WK_TB00000003_BOOKMARKS}" "TOOLBAR 0" 59419 1 1 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
+"{WK_TB00000004_TEMPLATES}" "TOOLBAR 0" 59419 1 0 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
+"{WK_TB00000005_SEARCH}" "TOOLBAR 0" 59419 0 1 "0.00" 0 0 0 0 0 18 0 "" "0.0" 
+"{WK_TB00000007_DEBUG}" "TOOLBAR 0" 59419 2 0 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
+"{WK_TB00000008_DEBUGRUN}" "TOOLBAR 0" 59419 2 1 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
+"{WK_TB00000009_VERSIONCONTROL}" "TOOLBAR 0" 59419 1 3 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
+"{WK_TB00000012_MAP}" "TOOLBAR 0" 59419 1 4 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
+"{WK_TB00000018_DEFAULTWINDOW}" "TOOLBAR 0" 59419 1 2 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
+"{WK_TB00000026_MACRO}" "TOOLBAR 0" 59419 1 6 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
+"{WK_TB00000028_RTOSDEBUG}" "TOOLBAR 0" 59419 2 2 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
+"{WK_TB00000029_SYSTEMTOOL}" "TOOLBAR 0" 59419 2 3 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
+[WINDOW_POSITION_STATE_DATA_VD2]
+[WINDOW_POSITION_STATE_DATA_VD3]
+[WINDOW_POSITION_STATE_DATA_VD4]
+[WINDOW_Z_ORDER]
+"D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\TPSP4c1.c" 
+"D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\uart0.h" 
+"D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\uart0.c" 
+[TARGET_NAME]
+"" "" 1398362941 
+[STATUSBAR_STATEINFO_VD1]
+"MasterShowState" 1 
+"ApplicationShowState" 1 
+"DebuggerShowState" 1 
+[STATUSBAR_STATEINFO_VD2]
+"MasterShowState" 1 
+"ApplicationShowState" 1 
+"DebuggerShowState" 1 
+[STATUSBAR_STATEINFO_VD3]
+"MasterShowState" 1 
+"ApplicationShowState" 1 
+"DebuggerShowState" 1 
+[STATUSBAR_STATEINFO_VD4]
+"MasterShowState" 1 
+"ApplicationShowState" 1 
+"DebuggerShowState" 1 
+[STATUSBAR_DEBUGGER_PANESTATE_VD1]
+[STATUSBAR_DEBUGGER_PANESTATE_VD2]
+[STATUSBAR_DEBUGGER_PANESTATE_VD3]
+[STATUSBAR_DEBUGGER_PANESTATE_VD4]
+[DEBUGGER_OPTIONS]
+"" 
+[DOWNLOAD_MODULES]
+[CONNECT_ON_GO]
+"FALSE" 
+[DOWNLOAD_MODULES_AFTER_BUILD]
+"TRUE" 
+[REMOVE_BREAKPOINTS_ON_DOWNLOAD]
+"FALSE" 
+[DISABLE_MEMORY_ACCESS_PRIOR_TO_COMMAND_FILE_EXECUTION]
+"FALSE" 
+[LIMIT_DISASSEMBLY_MEMORY_ACCESS]
+"FALSE" 
+[DISABLE_MEMORY_ACCESS_DURING_EXECUTION]
+"FALSE" 
+[DEBUGGER_OPTIONS_PROPERTIES]
+"1" 
+[COMMAND_FILES]
+[DEFAULT_DEBUG_FORMAT]
+"" 
+[FLASH_DETAILS]
+"" 0 0 "" 0 "" 0 0 "" 0 0 0 0 0 0 0 "" "" "" "" "" 
+[BREAKPOINTS]
+[END]
Index: branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/SessionM32C_E8a_SYSTEM.hsf
===================================================================
--- branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/SessionM32C_E8a_SYSTEM.hsf	(nonexistent)
+++ branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/SessionM32C_E8a_SYSTEM.hsf	(revision 771)
@@ -0,0 +1,72 @@
+[HIMDBVersion]
+2.0
+[DATABASE_VERSION]
+"2.3" 
+[SESSION_DETAILS]
+"" 
+[INFORMATION]
+"" 
+[GENERAL_DATA]
+"RESET_CPU_AFTER_DOWNLOAD_TAG" "VARIANT_TRUE_STORE_TAG" 
+[LANGUAGE]
+"English" 
+[CONFIG_INFO_VD1]
+0 
+[CONFIG_INFO_VD2]
+0 
+[CONFIG_INFO_VD3]
+0 
+[CONFIG_INFO_VD4]
+0 
+[WINDOW_POSITION_STATE_DATA_VD1]
+[WINDOW_POSITION_STATE_DATA_VD2]
+[WINDOW_POSITION_STATE_DATA_VD3]
+[WINDOW_POSITION_STATE_DATA_VD4]
+[WINDOW_Z_ORDER]
+[TARGET_NAME]
+"M32C E8a SYSTEM" "" 0 
+[STATUSBAR_STATEINFO_VD1]
+"MasterShowState" 1 
+"ApplicationShowState" 1 
+"DebuggerShowState" 1 
+[STATUSBAR_STATEINFO_VD2]
+"MasterShowState" 1 
+"ApplicationShowState" 1 
+"DebuggerShowState" 1 
+[STATUSBAR_STATEINFO_VD3]
+"MasterShowState" 1 
+"ApplicationShowState" 1 
+"DebuggerShowState" 1 
+[STATUSBAR_STATEINFO_VD4]
+"MasterShowState" 1 
+"ApplicationShowState" 1 
+"DebuggerShowState" 1 
+[STATUSBAR_DEBUGGER_PANESTATE_VD1]
+[STATUSBAR_DEBUGGER_PANESTATE_VD2]
+[STATUSBAR_DEBUGGER_PANESTATE_VD3]
+[STATUSBAR_DEBUGGER_PANESTATE_VD4]
+[DEBUGGER_OPTIONS]
+"Unknown Options" 
+[DOWNLOAD_MODULES]
+"$(CONFIGDIR)\$(PROJECTNAME).x30" 0 "IEEE695_RENESAS" 0 0 1 0 
+[CONNECT_ON_GO]
+"FALSE" 
+[DOWNLOAD_MODULES_AFTER_BUILD]
+"TRUE" 
+[REMOVE_BREAKPOINTS_ON_DOWNLOAD]
+"FALSE" 
+[DISABLE_MEMORY_ACCESS_PRIOR_TO_COMMAND_FILE_EXECUTION]
+"FALSE" 
+[LIMIT_DISASSEMBLY_MEMORY_ACCESS]
+"FALSE" 
+[DISABLE_MEMORY_ACCESS_DURING_EXECUTION]
+"FALSE" 
+[DEBUGGER_OPTIONS_PROPERTIES]
+"1" 
+[COMMAND_FILES]
+[DEFAULT_DEBUG_FORMAT]
+"" 
+[FLASH_DETAILS]
+"" 0 0 "" 0 "" 0 0 "" 0 0 0 0 0 0 0 "" "" "" "" "" 
+[BREAKPOINTS]
+[END]
Index: branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/ncrt0.a30
===================================================================
--- branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/ncrt0.a30	(nonexistent)
+++ branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/ncrt0.a30	(revision 771)
@@ -0,0 +1,368 @@
+;*******************************************************************************
+;
+;     C COMPILER for M16C/80
+; Copyright (C) 1999 (2000 - 2010) Renesas Electronics Corporation.
+; and Renesas Solutions Corporation. All rights reserved.
+;
+;
+;     ncrt0.a30 : NC308 startup program
+;
+;     This program is applicable when using the basic I/O library
+;       
+;     $Date: 2005/10/12 11:03:05 $
+;     $Revision: 1.30 $
+;
+;*******************************************************************************
+
+;---------------------------------------------------------------------
+; HEEP SIZE definition
+;---------------------------------------------------------------------
+.if __HEAP__ == 1		; for HEW
+
+HEAPSIZE	.equ	0h
+
+.else
+.if __HEAPSIZE__ == 0
+
+HEAPSIZE	.equ	300h
+
+.else				; for HEW
+
+HEAPSIZE	.equ	__HEAPSIZE__
+
+.endif
+.endif
+
+;---------------------------------------------------------------------
+; STACK SIZE definition
+;---------------------------------------------------------------------
+.if __USTACKSIZE__ == 0
+
+STACKSIZE	.equ	300h
+
+.else				; for HEW
+
+STACKSIZE	.equ	__USTACKSIZE__
+
+.endif
+
+;---------------------------------------------------------------------
+; INTERRUPT STACK SIZE definition
+;---------------------------------------------------------------------
+.if __ISTACKSIZE__ == 0
+
+ISTACKSIZE	.equ	300h
+
+.else				; for HEW
+
+ISTACKSIZE	.equ	__ISTACKSIZE__
+
+.endif
+
+;---------------------------------------------------------------------
+; INTERRUPT VECTOR ADDRESS  definition
+;---------------------------------------------------------------------
+VECTOR_ADR 	.equ	0fffd00h
+SVECTOR_ADR 	.equ	0fffe00h
+
+;---------------------------------------------------------------
+; special page definition
+;---------------------------------------------------------------
+;       macro define for special page
+;
+;Format:
+;	SPECIAL	number
+;
+
+SPECIAL	.macro	NUM
+	.org	0FFFFFEH-(NUM*2)
+	.glb	__SPECIAL_@NUM
+	.word	__SPECIAL_@NUM  & 0FFFFH
+.endm
+;---------------------------------------------------------------------
+; Section allocation
+;---------------------------------------------------------------------
+	.list OFF
+	.include sect308.inc
+	.list ON
+
+;---------------------------------------------------------------------
+; SBDATA area definition
+;---------------------------------------------------------------------
+	.glb	__SB__
+__SB__	.equ	data_SE_top
+
+;====================================================================
+; Initialize Macro declaration
+;---------------------------------------------------------------------
+;
+; when copy less 64K byte
+BZERO	.macro	TOP_ ,SECT_
+	mov.b	#00H, R0L
+	mov.l	#TOP_, A1
+	mov.w	#sizeof SECT_ , R3
+	sstr.b	
+	.endm
+
+BCOPY .macro	FROM_,TO_,SECT_
+	mov.l	#FROM_ ,A0
+	mov.l	#TO_ ,A1
+	mov.w	#sizeof SECT_ , R3
+	smovf.b
+	.endm
+
+; when copy over 64K byte
+;BZEROL	.macro	TOP_,SECT_
+;	push.w	#sizeof SECT_ >> 16
+;	push.w	#sizeof SECT_  & 0ffffh
+;	pusha	TOP_
+;	.stk	8
+;
+;	.glb	_bzero	
+;	.call	_bzero,G
+;	jsr.a	_bzero
+;	.endm
+;
+;
+;BCOPYL	.macro	FROM_ ,TO_ ,SECT_
+;	push.w	#sizeof SECT_  >> 16
+;	push.w	#sizeof SECT_  & 0ffffh
+;	pusha	TO_
+;	pusha	FROM_
+;	.stk	12
+;
+;	.glb	_bcopy
+;	.call	_bcopy,G
+;	jsr.a	_bcopy
+;	.endm
+;
+
+
+;====================================================================
+; Interrupt section start
+;---------------------------------------------------------------------
+	.insf	start,S,0
+	.glb	start
+	.section	interrupt
+start:
+;---------------------------------------------------------------------
+; after reset,this program will start
+;---------------------------------------------------------------------
+	ldc	#istack_top,	isp	;set istack pointer
+	mov.b	#02h,0ah
+	mov.b	#00h,04h		;set processer mode 
+	mov.b	#00h,0ah
+	ldc	#0080h,	flg
+	ldc	#stack_top,	sp	;set stack pointer 
+	ldc	#data_SE_top,	sb	;set sb register 
+
+	fset	b			;switch to bank 1
+	ldc	#data_SE_top,	sb	;set sb register 
+	fclr	b			;switch to bank 0
+
+	ldc	#VECTOR_ADR,intb
+
+;====================================================================
+; NEAR area initialize.
+;--------------------------------------------------------------------
+; bss zero clear
+;--------------------------------------------------------------------
+	BZERO	bss_SE_top,bss_SE
+	BZERO	bss_SO_top,bss_SO
+	BZERO	bss_NE_top,bss_NE
+	BZERO	bss_NO_top,bss_NO
+
+; for NSD
+	BZERO	bss_MON1_SE_top,bss_MON1_SE
+	BZERO	bss_MON2_SE_top,bss_MON2_SE
+	BZERO	bss_MON3_SE_top,bss_MON3_SE
+	BZERO	bss_MON4_SE_top,bss_MON4_SE
+
+	BZERO	bss_MON1_SO_top,bss_MON1_SO
+	BZERO	bss_MON2_SO_top,bss_MON2_SO
+	BZERO	bss_MON3_SO_top,bss_MON3_SO
+	BZERO	bss_MON4_SO_top,bss_MON4_SO
+
+	BZERO	bss_MON1_E_top,bss_MON1_E
+	BZERO	bss_MON2_E_top,bss_MON2_E
+	BZERO	bss_MON3_E_top,bss_MON3_E
+	BZERO	bss_MON4_E_top,bss_MON4_E
+
+	BZERO	bss_MON1_O_top,bss_MON1_O
+	BZERO	bss_MON2_O_top,bss_MON2_O
+	BZERO	bss_MON3_O_top,bss_MON3_O
+	BZERO	bss_MON4_O_top,bss_MON4_O
+
+
+
+;---------------------------------------------------------------------
+; initialize data section
+;---------------------------------------------------------------------
+	BCOPY	data_SEI_top,data_SE_top,data_SE
+	BCOPY	data_SOI_top,data_SO_top,data_SO
+	BCOPY	data_NEI_top,data_NE_top,data_NE
+	BCOPY	data_NOI_top,data_NO_top,data_NO
+
+; for NSD
+	BCOPY	data_MON1_SEI_top,data_MON1_SE_top,data_MON1_SE
+	BCOPY	data_MON2_SEI_top,data_MON2_SE_top,data_MON2_SE
+	BCOPY	data_MON3_SEI_top,data_MON3_SE_top,data_MON3_SE
+	BCOPY	data_MON4_SEI_top,data_MON4_SE_top,data_MON4_SE
+
+	BCOPY	data_MON1_SOI_top,data_MON1_SO_top,data_MON1_SO
+	BCOPY	data_MON2_SOI_top,data_MON2_SO_top,data_MON2_SO
+	BCOPY	data_MON3_SOI_top,data_MON3_SO_top,data_MON3_SO
+	BCOPY	data_MON4_SOI_top,data_MON4_SO_top,data_MON4_SO
+
+	BCOPY	data_MON1_EI_top,data_MON1_E_top,data_MON1_E
+	BCOPY	data_MON2_EI_top,data_MON2_E_top,data_MON2_E
+	BCOPY	data_MON3_EI_top,data_MON3_E_top,data_MON3_E
+	BCOPY	data_MON4_EI_top,data_MON4_E_top,data_MON4_E
+
+	BCOPY	data_MON1_OI_top,data_MON1_O_top,data_MON1_O
+	BCOPY	data_MON2_OI_top,data_MON2_O_top,data_MON2_O
+	BCOPY	data_MON3_OI_top,data_MON3_O_top,data_MON3_O
+	BCOPY	data_MON4_OI_top,data_MON4_O_top,data_MON4_O
+
+
+;====================================================================
+; FAR area initialize.
+;---------------------------------------------------------------------
+; bss zero clear
+;---------------------------------------------------------------------
+;	BZERO	bss_SE_top,bss_SE
+;	BZERO	bss_SO_top,bss_SO
+;	BZERO	bss_6E_top,bss_6E
+;	BZERO	bss_6O_top,bss_6O
+	BZERO	bss_FE_top,bss_FE
+	BZERO	bss_FO_top,bss_FO
+
+; for NSD
+;	BZERO	bss_MON1_SE_top,bss_MON1_SE
+;	BZERO	bss_MON2_SE_top,bss_MON2_SE
+;	BZERO	bss_MON3_SE_top,bss_MON3_SE
+;	BZERO	bss_MON4_SE_top,bss_MON4_SE
+;
+;	BZERO	bss_MON1_SO_top,bss_MON1_SO
+;	BZERO	bss_MON2_SO_top,bss_MON2_SO
+;	BZERO	bss_MON3_SO_top,bss_MON3_SO
+;	BZERO	bss_MON4_SO_top,bss_MON4_SO
+;
+;	BZERO	bss_MON1_6E_top,bss_MON1_6E
+;	BZERO	bss_MON2_6E_top,bss_MON2_6E
+;	BZERO	bss_MON3_6E_top,bss_MON3_6E
+;	BZERO	bss_MON4_6E_top,bss_MON4_6E
+;
+;	BZERO	bss_MON1_6O_top,bss_MON1_6O
+;	BZERO	bss_MON2_6O_top,bss_MON2_6O
+;	BZERO	bss_MON3_6O_top,bss_MON3_6O
+;	BZERO	bss_MON4_6O_top,bss_MON4_6O
+;
+;	BZERO	bss_MON1_E_top,bss_MON1_E
+;	BZERO	bss_MON2_E_top,bss_MON2_E
+;	BZERO	bss_MON3_E_top,bss_MON3_E
+;	BZERO	bss_MON4_E_top,bss_MON4_E
+;
+;	BZERO	bss_MON1_O_top,bss_MON1_O
+;	BZERO	bss_MON2_O_top,bss_MON2_O
+;	BZERO	bss_MON3_O_top,bss_MON3_O
+;	BZERO	bss_MON4_O_top,bss_MON4_O
+
+
+;---------------------------------------------------------------------
+; Copy edata_E(O) section from edata_EI(OI) section
+;---------------------------------------------------------------------
+;	BCOPY	data_SEI_top,data_SE_top,data_SE
+;	BCOPY	data_SOI_top,data_SO_top,data_SO
+;	BCOPY	data_6EI_top,data_6E_top,data_6E
+;	BCOPY	data_6OI_top,data_6O_top,data_6O
+	BCOPY	data_FEI_top,data_FE_top,data_FE
+	BCOPY	data_FOI_top,data_FO_top,data_FO
+
+; for NSD
+;	BCOPY	data_MON1_SEI_top,data_MON1_SE_top,data_MON1_SE
+;	BCOPY	data_MON2_SEI_top,data_MON2_SE_top,data_MON2_SE
+;	BCOPY	data_MON3_SEI_top,data_MON3_SE_top,data_MON3_SE
+;	BCOPY	data_MON4_SEI_top,data_MON4_SE_top,data_MON4_SE
+;
+;	BCOPY	data_MON1_SOI_top,data_MON1_SO_top,data_MON1_SO
+;	BCOPY	data_MON2_SOI_top,data_MON2_SO_top,data_MON2_SO
+;	BCOPY	data_MON3_SOI_top,data_MON3_SO_top,data_MON3_SO
+;	BCOPY	data_MON4_SOI_top,data_MON4_SO_top,data_MON4_SO
+;
+;	BCOPY	data_MON1_6EI_top,data_MON1_6E_top,data_MON1_6E
+;	BCOPY	data_MON2_6EI_top,data_MON2_6E_top,data_MON2_6E
+;	BCOPY	data_MON3_6EI_top,data_MON3_6E_top,data_MON3_6E
+;	BCOPY	data_MON4_6EI_top,data_MON4_6E_top,data_MON4_6E
+;
+;	BCOPY	data_MON1_6OI_top,data_MON1_6O_top,data_MON1_6O
+;	BCOPY	data_MON2_6OI_top,data_MON2_6O_top,data_MON2_6O
+;	BCOPY	data_MON3_6OI_top,data_MON3_6O_top,data_MON3_6O
+;	BCOPY	data_MON4_6OI_top,data_MON4_6O_top,data_MON4_6O
+;
+;	BCOPY	data_MON1_EI_top,data_MON1_E_top,data_MON1_E
+;	BCOPY	data_MON2_EI_top,data_MON2_E_top,data_MON2_E
+;	BCOPY	data_MON3_EI_top,data_MON3_E_top,data_MON3_E
+;	BCOPY	data_MON4_EI_top,data_MON4_E_top,data_MON4_E
+;
+;	BCOPY	data_MON1_OI_top,data_MON1_O_top,data_MON1_O
+;	BCOPY	data_MON2_OI_top,data_MON2_O_top,data_MON2_O
+;	BCOPY	data_MON3_OI_top,data_MON3_O_top,data_MON3_O
+;	BCOPY	data_MON4_OI_top,data_MON4_O_top,data_MON4_O
+
+
+	ldc	#stack_top,sp
+
+;	.stk	-??	; Validate this when use BZEROL,BCOPYL
+
+;====================================================================
+; heap area initialize
+;---------------------------------------------------------------------
+.if __HEAP__ != 1
+	.glb	__mnext
+	.glb	__msize
+	mov.l	#(heap_top&0FFFFFFH), __mnext
+	mov.l	#(HEAPSIZE&0FFFFFFH), __msize
+.endif
+;====================================================================
+; Initialize standard I/O
+;---------------------------------------------------------------------
+.if __STANDARD_IO__ == 1
+	.glb	__init
+	.call	__init,G
+	jsr.a	__init
+.endif
+
+;====================================================================
+; Call main() function
+;---------------------------------------------------------------------
+	ldc	#0h,fb	; for debuger
+
+	.glb	_main
+	jsr.a	_main
+
+;====================================================================
+; exit() function
+;---------------------------------------------------------------------
+	.glb	_exit
+	.glb	$exit
+_exit:			   ; End program
+$exit:
+	jmp	_exit
+	.einsf
+
+;====================================================================
+; dummy interrupt function
+;---------------------------------------------------------------------
+	.glb	dummy_int
+dummy_int:
+	reit
+	.end
+;*******************************************************************************
+;
+;     C COMPILER for M16C/80
+; Copyright (C) 1999 (2000 - 2010) Renesas Electronics Corporation.
+; and Renesas Solutions Corporation. All rights reserved.
+;
+;
+;*******************************************************************************
Index: branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/TPSP4c1.hwp
===================================================================
--- branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/TPSP4c1.hwp	(nonexistent)
+++ branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/TPSP4c1.hwp	(revision 771)
@@ -0,0 +1,274 @@
+[HIMDBVersion]
+2.0
+[DATABASE_VERSION]
+"2.8" 
+[PROJECT_DETAILS]
+"TPSP4c1" "D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1" "D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\TPSP4c1.hwp" "M16C/80,M32C" "Renesas M32C Standard" "Application" "M32C/80" "M32C/87(M32C/87B)" 
+[INFORMATION]
+"No project information available" 
+[TOOL_CHAIN]
+"Renesas M32C Standard Toolchain" "5.42.00" 
+[CONFIGURATIONS]
+"Debug" "D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\Debug" 
+"Debug_M32C_E8a_SYSTEM" "D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\Debug_M32C_E8a_SYSTEM" 
+"Debug_M32C_Simulator" "D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\Debug_M32C_Simulator" 
+"Release" "D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\Release" 
+[BUILD_PHASES]
+"Renesas M32C Assembler" 1 
+"Renesas M32C C Compiler" 1 
+"Renesas M32C Configurator" 1 
+"Renesas M32C Librarian" 1 
+"Renesas M32C Linker" 1 
+"Renesas M32C Stype Converter" 1 
+[TOOL_ENVIRONMENT]
+[EXTENSIONS]
+"Absolute file" "X30" 
+"Absolute list file" "ALS" 
+"Assembler error tag file" "ATG" 
+"Assembly include file" "INC" 
+"Assembly list file" "LST" 
+"Assembly source file" "A30" 
+"Branch Information file" "JIN" 
+"C header file" "H" 
+"C source file" "C" 
+"Configuration file" "CFG" 
+"Cross reference file" "XRF" 
+"Hex file" "HEX" 
+"ID file" "ID" 
+"Library file" "LIB" 
+"Library list file" "LLS" 
+"Linkage error tag file" "LTG" 
+"Linkage map file" "MAP" 
+"Preprocessed C source file" "I" 
+"Relocatable file" "R30" 
+"S-Record file" "MOT" 
+"Systemcall file" "MRC" 
+[FILE_GROUPS]
+"Absolute file" "BIN" "NONE" "" 
+"Absolute list file" "TEXT" "EDITOR" "" 
+"Assembler error tag file" "TEXT" "EDITOR" "" 
+"Assembly include file" "TEXT" "EDITOR" "" 
+"Assembly list file" "TEXT" "EDITOR" "" 
+"Assembly source file" "TEXT" "EDITOR" "" 
+"Branch Information file" "TEXT" "EDITOR" "" 
+"C header file" "TEXT" "EDITOR" "" 
+"C source file" "TEXT" "EDITOR" "" 
+"Configuration file" "TEXT" "EDITOR" "" 
+"Cross reference file" "TEXT" "EDITOR" "" 
+"Hex file" "TEXT" "EDITOR" "" 
+"ID file" "TEXT" "EDITOR" "" 
+"Library file" "BIN" "NONE" "" 
+"Library list file" "TEXT" "EDITOR" "" 
+"Linkage error tag file" "TEXT" "EDITOR" "" 
+"Linkage map file" "TEXT" "EDITOR" "" 
+"Preprocessed C source file" "TEXT" "EDITOR" "" 
+"Relocatable file" "BIN" "NONE" "" 
+"S-Record file" "TEXT" "EDITOR" "" 
+"Systemcall file" "TEXT" "EDITOR" "" 
+[ASSOCIATED_APPLICATIONS]
+[TOOLCHAIN_PHASE]
+"Renesas M32C Assembler" 
+"Renesas M32C C Compiler" 
+"Renesas M32C Configurator" 
+"Renesas M32C Librarian" 
+"Renesas M32C Linker" 
+"Renesas M32C Stype Converter" 
+[UTILITY_PHASE]
+[CUSTOM_PHASES]
+[CUSTOM_PHASE_INPUT_GROUP]
+[CUSTOM_PHASE_OUTPUT_SYNTAX]
+[BUILD_ORDER]
+"Renesas M32C C Compiler" 1 
+"Renesas M32C Assembler" 1 
+"Renesas M32C Linker" 1 
+"Renesas M32C Stype Converter" 1 
+"Renesas M32C Librarian" 0 
+"Renesas M32C Configurator" 0 
+[BUILD_PHASE_DETAILS]
+"Renesas M32C Assembler" "Assembly source file" 1 
+"Renesas M32C C Compiler" "C source file" 1 
+"Renesas M32C Configurator" "Configuration file" 0 
+"Renesas M32C Librarian" "Relocatable file" 0 
+"Renesas M32C Linker" "Relocatable file" 0 
+"Renesas M32C Stype Converter" "Absolute file" 0 
+[BUILD_FILE_ORDER_Assembly source file]
+"Renesas M32C Assembler" 1 
+[BUILD_FILE_ORDER_C source file]
+"Renesas M32C C Compiler" 1 
+[SCRAP]
+"Project Generator Setup File" "" 
+[MAPPINGS]
+"Absolute file" "Renesas M32C Stype Converter" "Renesas M32C Linker" 
+"Assembly source file" "Renesas M32C Assembler" "Renesas M32C C Compiler" 
+"Relocatable file" "Renesas M32C Librarian" "Renesas M32C Assembler" 
+"Relocatable file" "Renesas M32C Librarian" "Renesas M32C C Compiler" 
+"Relocatable file" "Renesas M32C Linker" "Renesas M32C Assembler" 
+"Relocatable file" "Renesas M32C Linker" "Renesas M32C C Compiler" 
+[PROJECT_FILES]
+"D:\TP_SP4_CHAMBELLON\sfr32c87.h" "User" "C header file" 2 
+"D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\TPSP4c1.c" "User" "C source file" 2 
+"D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\ncrt0.a30" "User" "Assembly source file" 2 
+"D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\uart0.c" "User" "C source file" 2 
+"D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\uart0.h" "User" "C header file" 2 
+[FOLDER]
+"Assembly source file" "Assembly source file" 
+"C header file" "C header file" 
+"C source file" "C source file" 
+[GENERAL_DATA_PROJECT]
+"USE_CUSTOM_LINKAGE_ORDER" "1" 
+[ON_DEMAND_COMPONENTS_LOADED]
+[SYNC_SESSION_NAMES]
+[SESSIONS]
+"DefaultSession" "D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\DefaultSession.hsf" 0 
+"SessionM32C_E8a_SYSTEM" "D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\SessionM32C_E8a_SYSTEM.hsf" 0 
+"SessionM32C_Simulator" "D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\SessionM32C_Simulator.hsf" 0 
+[GENERAL_DATA_SESSION_DefaultSession]
+[GENERAL_DATA_SESSION_SessionM32C_E8a_SYSTEM]
+[GENERAL_DATA_SESSION_SessionM32C_Simulator]
+[OPTIONS_Debug_Renesas M32C Assembler]
+"Assembly source file" "0a94f4ea78857d10" 2 
+"D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\ncrt0.a30" "0a94f4ea78857d10" 2 
+[OPTIONS_Debug_Renesas M32C C Compiler]
+"C source file" "0a94f4ea78857d10" 1 
+"D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\TPSP4c1.c" "0a94f4ea78857d10" 1 
+"D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\uart0.c" "0616c7ad88857d10" 1 
+[OPTIONS_Debug_Renesas M32C Configurator]
+"Single Shot" "0616c7ad88857d10" 6 
+[OPTIONS_Debug_Renesas M32C Librarian]
+"Single Shot" "0616c7ad88857d10" 5 
+[OPTIONS_Debug_Renesas M32C Linker]
+"Single Shot" "0616c7ad88857d10" 3 
+[OPTIONS_Debug_Renesas M32C Stype Converter]
+"Single Shot" "0616c7ad88857d10" 4 
+[OPTIONS_Debug]
+"" 0 
+"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON3] " 6 
+"[V|VERSION|1] [B|DATALENGTH|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] " 4 
+"[V|VERSION|1] [B|STARTUPLINK|1] [B|DEBUG|1] [B|MAP-S|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).x30^"] [S|INPUTLIBRARY|^"L=nc382lib^"] [S|CPU|M32C80] " 3 
+"[V|VERSION|1] [S|LIST|LM] [B|INSPECTOR|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [S|CPU|M32C80] [B|HEAP|1] [S|DEFINE|__USTACKSIZE__=0300H] [S|DEFINE|__ISTACKSIZE__=0300H]" 2 
+"[V|VERSION|1] [S|MODE|CREATE|] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] " 5 
+"[V|VERSION|1] [S|OUTPUT|OBJECTCODE] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [B|INSPECTOR|1] [S|CPU|M32C80] " 1 
+[EXCLUDED_FILES_Debug]
+[LINKAGE_ORDER_Debug]
+"D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\Debug\ncrt0.r30" 
+[GENERAL_DATA_CONFIGURATION_Debug]
+[OPTIONS_Debug_M32C_E8a_SYSTEM_Renesas M32C Assembler]
+"Assembly source file" "0a94f4ea78857d10" 2 
+"D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\ncrt0.a30" "0a94f4ea78857d10" 2 
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+"Single Shot" "0616c7ad88857d10" 4 
+[OPTIONS_Debug_M32C_E8a_SYSTEM]
+"" 0 
+"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON3] " 6 
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+[EXCLUDED_FILES_Debug_M32C_E8a_SYSTEM]
+[LINKAGE_ORDER_Debug_M32C_E8a_SYSTEM]
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+[OPTIONS_Debug_M32C_Simulator_Renesas M32C C Compiler]
+"C source file" "0a94f4ea78857d10" 1 
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+[OPTIONS_Debug_M32C_Simulator_Renesas M32C Linker]
+"Single Shot" "0616c7ad88857d10" 3 
+[OPTIONS_Debug_M32C_Simulator_Renesas M32C Stype Converter]
+"Single Shot" "0616c7ad88857d10" 4 
+[OPTIONS_Debug_M32C_Simulator]
+"" 0 
+"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON3] " 6 
+"[V|VERSION|1] [B|DATALENGTH|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] " 4 
+"[V|VERSION|1] [B|STARTUPLINK|1] [B|DEBUG|1] [B|MAP-S|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).x30^"] [S|INPUTLIBRARY|^"L=nc382lib^"] [S|CPU|M32C80] " 3 
+"[V|VERSION|1] [S|LIST|L|M] [B|INSPECTOR|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [S|CPU|M32C80] [B|HEAP|1] [S|DEFINE|__USTACKSIZE__=0300H] [S|DEFINE|__ISTACKSIZE__=0300H]" 2 
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+[EXCLUDED_FILES_Debug_M32C_Simulator]
+[LINKAGE_ORDER_Debug_M32C_Simulator]
+"D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\Debug_M32C_Simulator\ncrt0.r30" 
+[GENERAL_DATA_CONFIGURATION_Debug_M32C_Simulator]
+[OPTIONS_Release_Renesas M32C Assembler]
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+[OPTIONS_Release_Renesas M32C C Compiler]
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+[OPTIONS_Release_Renesas M32C Configurator]
+"Single Shot" "0616c7ad88857d10" 6 
+[OPTIONS_Release_Renesas M32C Librarian]
+"Single Shot" "0616c7ad88857d10" 5 
+[OPTIONS_Release_Renesas M32C Linker]
+"Single Shot" "0616c7ad88857d10" 3 
+[OPTIONS_Release_Renesas M32C Stype Converter]
+"Single Shot" "0616c7ad88857d10" 4 
+[OPTIONS_Release]
+"" 0 
+"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON3] " 6 
+"[V|VERSION|1] [B|DATALENGTH|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] " 4 
+"[V|VERSION|1] [B|STARTUPLINK|1] [B|DEBUG|1] [B|MAP-S|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).x30^"] [S|INPUTLIBRARY|^"L=nc382lib^"] [S|CPU|M32C80] " 3 
+"[V|VERSION|1] [S|LIST|L|M] [B|INSPECTOR|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [S|CPU|M32C80] [B|HEAP|1] [S|DEFINE|__USTACKSIZE__=0300H] [S|DEFINE|__ISTACKSIZE__=0300H]" 2 
+"[V|VERSION|1] [S|MODE|CREATE|] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] " 5 
+"[V|VERSION|1] [S|OUTPUT|OBJECTCODE] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [B|INSPECTOR|1] [S|CPU|M32C80] " 1 
+[EXCLUDED_FILES_Release]
+[LINKAGE_ORDER_Release]
+"D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\Release\ncrt0.r30" 
+[GENERAL_DATA_CONFIGURATION_Release]
+[GENERAL_DATA_CONFIGURATION_SESSION_Debug_DefaultSession]
+[SESSION_DATA_CONFIGURATION_SESSION_Debug_DefaultSession]
+"MEMORY_MAPPING_OPTIONS" "" 
+[GENERAL_DATA_CONFIGURATION_SESSION_Debug_SessionM32C_E8a_SYSTEM]
+[SESSION_DATA_CONFIGURATION_SESSION_Debug_SessionM32C_E8a_SYSTEM]
+"MEMORY_MAPPING_OPTIONS" "Unknown Options" 
+[GENERAL_DATA_CONFIGURATION_SESSION_Debug_SessionM32C_Simulator]
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+[SESSION_DATA_CONFIGURATION_SESSION_Debug_M32C_E8a_SYSTEM_SessionM32C_E8a_SYSTEM]
+"MEMORY_MAPPING_OPTIONS" "Unknown Options" 
+[GENERAL_DATA_CONFIGURATION_SESSION_Debug_M32C_E8a_SYSTEM_SessionM32C_Simulator]
+[SESSION_DATA_CONFIGURATION_SESSION_Debug_M32C_E8a_SYSTEM_SessionM32C_Simulator]
+"MEMORY_MAPPING_OPTIONS" "Unknown Options" 
+[GENERAL_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_DefaultSession]
+[SESSION_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_DefaultSession]
+"MEMORY_MAPPING_OPTIONS" "" 
+[GENERAL_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_SessionM32C_E8a_SYSTEM]
+[SESSION_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_SessionM32C_E8a_SYSTEM]
+"MEMORY_MAPPING_OPTIONS" "Unknown Options" 
+[GENERAL_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_SessionM32C_Simulator]
+[SESSION_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_SessionM32C_Simulator]
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+[GENERAL_DATA_CONFIGURATION_SESSION_Release_DefaultSession]
+[SESSION_DATA_CONFIGURATION_SESSION_Release_DefaultSession]
+"MEMORY_MAPPING_OPTIONS" "" 
+[GENERAL_DATA_CONFIGURATION_SESSION_Release_SessionM32C_E8a_SYSTEM]
+[SESSION_DATA_CONFIGURATION_SESSION_Release_SessionM32C_E8a_SYSTEM]
+"MEMORY_MAPPING_OPTIONS" "Unknown Options" 
+[GENERAL_DATA_CONFIGURATION_SESSION_Release_SessionM32C_Simulator]
+[SESSION_DATA_CONFIGURATION_SESSION_Release_SessionM32C_Simulator]
+"MEMORY_MAPPING_OPTIONS" "Unknown Options" 
+[EXT_DEBUGGER_INFO]
+0 "" "" "" "" 
+[END]
Index: branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/uart0.c
===================================================================
--- branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/uart0.c	(nonexistent)
+++ branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1/uart0.c	(revision 771)
@@ -0,0 +1,9 @@
+ 
+ 
+ 
+ 
+void uart0_init(void)
+
+void uart0_tx(char c) 
+
+char uart0_rx(void)
Index: branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1.hws
===================================================================
--- branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1.hws	(nonexistent)
+++ branch/CHAMBELLON/sp4c12/TPSP4c1/TPSP4c1.hws	(revision 771)
@@ -0,0 +1,40 @@
+[HIMDBVersion]
+2.0
+[DATABASE_VERSION]
+"11.0" 
+[WORKSPACE_DETAILS]
+"TPSP4c1" "D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1" "D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1.hws" "M16C/80,M32C" "Renesas M32C Standard" 
+[SHARED_WORKSPACE_CONTROL_STATUS]
+"" "" "" 
+"" "" "" 
+[PROJECTS]
+"TPSP4c1" "D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1" "D:\TP_SP4_CHAMBELLON\sp4c12\TPSP4c1\TPSP4c1\TPSP4c1.hwp" 0 
+[INFORMATION]
+"No workspace information available" 
+[SCRAP]
+[PROJECT_DEPENDENCY]
+[WORKSPACE_PROPERTIES]
+[HELP_FILES]
+[GENERAL_DATA_PROJECT]
+[USERMENUTOOLS]
+[CUSTOMPLACEHOLDERS]
+[MAKEFILE_BUILD_INFO]
+"$(WORKSPDIR)\make\$(PROJECTNAME)_$(CONFIGNAME).mak" "" "$(WORKSPDIR)\make" 0 0 0 
+[VD_CONFIGURATION_OPTIONS]
+"ACTIVE_DESKTOP" "0" 
+[VD_CONFIGURATIONS]
+"0" "Default1" "1" 
+"1" "Default2" "1" 
+"2" "Default3" "1" 
+"3" "Default4" "1" 
+[OPTIONS_DEBUG_TAB]
+0 0 0 0 0 
+[VCS]
+"" "" "" 0 
+[VCS_PROJECT]
+[MAKEFILE_ENV_STRINGS]
+[MAKEFILE_ENV_FLAGS]
+1 0 0 
+[MAKEFILE_CLEAN_INFO]
+"" 
+[END]
