Index: branch/CLAUD/sp4c12/SP41c/SP41c/uart0.h
===================================================================
--- branch/CLAUD/sp4c12/SP41c/SP41c/uart0.h	(nonexistent)
+++ branch/CLAUD/sp4c12/SP41c/SP41c/uart0.h	(revision 827)
@@ -0,0 +1,79 @@
+/***********************************************************************/
+/*                                                                     */
+/*  FILE        :SP41c.c                                               */
+/*  DATE        :Thu, Jun 03, 2021                                     */
+/*  DESCRIPTION :main program file.                                    */
+/*  CPU GROUP   :87B                                                   */
+/*                                                                     */
+/*  This file is generated by Renesas Project Generator (Ver.4.18).    */
+/*  NOTE:THIS IS A TYPICAL EXAMPLE.                                    */
+/***********************************************************************/
+
+void uart0_init (void);
+void uart0_tx(char c);
+char uart0_rx(void);
+
+void uart0_init()
+{
+	/*
+	smd0_u0mr = 1
+	smd1_u0mr = 0
+	smd2_u0mr = 1
+	ckdir_u0mr = 0
+	stps_u0mr = 0
+	pry_u0mr = 0
+	prye_u0mr = 0
+	iopol_u0mr = 0
+	*/
+	u0mr = 0x05;
+	
+	/*
+	clk0_u0c0 = 1
+	clk1_u0c0 = 0
+	crs_u0c0 = 0
+	txept_u0c0 = 0
+	crd_u0c0 = 1
+	nch_u0c0 = 0
+	ckpol_u0c0 = 0
+	uform_u0c0 = 0
+	*/
+	u0c0 = 0x11;
+	
+	/*
+	te_u0c1 = 1
+	ti_u0c1 = 0
+	re_u0c1 = 1
+	ri_u0c1 = 0
+	uilrs_u0c1 = 0
+	uirrm_u0c1 = 0
+	uilch_u0c1 = 0
+	sclkstpb_u0c1 = 0
+	uiere_u0c1 = 0
+	*/
+    u0c1 = 0x05;
+	
+	u0brg = 0x20; // m = 32
+	
+	// Config port 6 pd6 = 0x08
+	pd6_1 = 0;
+	pd6_2 = 0;
+	
+	ps0_1 = 0;
+	ps0_2 = 0;
+	ps0_3 = 1;	
+}
+
+void uart0_tx(char c)
+{
+	te_u0c1 = 1;
+    u0tb = c;
+	te_u0c1 = 0;
+}
+
+char uart0_rx()
+{   
+    return u0rb;
+}
+
+
+	
Index: branch/CLAUD/sp4c12/SP41c/SP41c/Debug_M32C_Simulator/Debug_M32C_Simulator.hdp
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Index: branch/CLAUD/sp4c12/SP41c/SP41c/Debug_M32C_E8a_SYSTEM/Debug_M32C_E8a_SYSTEM.hdp
===================================================================
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Property changes on: branch/CLAUD/sp4c12/SP41c/SP41c/Debug_M32C_E8a_SYSTEM/Debug_M32C_E8a_SYSTEM.hdp
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Index: branch/CLAUD/sp4c12/SP41c/SP41c/uart0.c
===================================================================
--- branch/CLAUD/sp4c12/SP41c/SP41c/uart0.c	(nonexistent)
+++ branch/CLAUD/sp4c12/SP41c/SP41c/uart0.c	(revision 827)
@@ -0,0 +1,28 @@
+/***********************************************************************/
+/*                                                                     */
+/*  FILE        :SP41c.c                                               */
+/*  DATE        :Thu, Jun 03, 2021                                     */
+/*  DESCRIPTION :main program file.                                    */
+/*  CPU GROUP   :87B                                                   */
+/*                                                                     */
+/*  This file is generated by Renesas Project Generator (Ver.4.18).    */
+/*  NOTE:THIS IS A TYPICAL EXAMPLE.                                    */
+/***********************************************************************/
+
+#include "sfr32c87.h"
+#include "uart0.h"
+
+
+
+void main(void)
+{
+	char c;
+	uart0_init();
+	
+	//c = '3';
+	while(1)
+	{
+		c = uart0_rx();
+		uart0_tx(c);
+	}
+}
\ No newline at end of file
