Index: trunk/librairies/polytech_ge/pcb/bornier_5_molex.dra
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: trunk/librairies/polytech_ge/pcb/bornier_5_molex.dra
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: trunk/librairies/polytech_ge/pcb/bornier_5_molex.psm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: trunk/librairies/polytech_ge/pcb/bornier_5_molex.psm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: trunk/librairies/polytech_ge/bornier_5/metadata/pinlist.txt
===================================================================
--- trunk/librairies/polytech_ge/bornier_5/metadata/pinlist.txt	(nonexistent)
+++ trunk/librairies/polytech_ge/bornier_5/metadata/pinlist.txt	(revision 214)
@@ -0,0 +1,108 @@
+(Pinlist
+	(Pin
+		(Name A)
+		(MSB )
+		(LSB )
+		(Type BIDIR)
+		(Location Right)
+		(InputLoadLow -0.01)
+		(InputLoadHigh 0.01)
+		(OutputLoadLow 1.0)
+		(OutputLoadHigh -1.0)
+		(CheckLoad Both)
+		(CheckIO Both)
+		(CheckDir 1)
+		(CheckAssert 1)
+		(CheckOutput 1)
+		(UnknownLoading 0)
+		(PinShape )
+		(DIFF_PAIR_PINS_POS )
+		(DIFF_PAIR_PINS_NEG )
+	)
+
+	(Pin
+		(Name B)
+		(MSB )
+		(LSB )
+		(Type BIDIR)
+		(Location Right)
+		(InputLoadLow -0.01)
+		(InputLoadHigh 0.01)
+		(OutputLoadLow 1.0)
+		(OutputLoadHigh -1.0)
+		(CheckLoad Both)
+		(CheckIO Both)
+		(CheckDir 1)
+		(CheckAssert 1)
+		(CheckOutput 1)
+		(UnknownLoading 0)
+		(PinShape )
+		(DIFF_PAIR_PINS_POS )
+		(DIFF_PAIR_PINS_NEG )
+	)
+
+	(Pin
+		(Name C)
+		(MSB )
+		(LSB )
+		(Type BIDIR)
+		(Location Right)
+		(InputLoadLow -0.01)
+		(InputLoadHigh 0.01)
+		(OutputLoadLow 1.0)
+		(OutputLoadHigh -1.0)
+		(CheckLoad Both)
+		(CheckIO Both)
+		(CheckDir 1)
+		(CheckAssert 1)
+		(CheckOutput 1)
+		(UnknownLoading 0)
+		(PinShape )
+		(DIFF_PAIR_PINS_POS )
+		(DIFF_PAIR_PINS_NEG )
+	)
+
+	(Pin
+		(Name D)
+		(MSB )
+		(LSB )
+		(Type BIDIR)
+		(Location Right)
+		(InputLoadLow -0.01)
+		(InputLoadHigh 0.01)
+		(OutputLoadLow 1.0)
+		(OutputLoadHigh -1.0)
+		(CheckLoad Both)
+		(CheckIO Both)
+		(CheckDir 1)
+		(CheckAssert 1)
+		(CheckOutput 1)
+		(UnknownLoading 0)
+		(PinShape )
+		(DIFF_PAIR_PINS_POS )
+		(DIFF_PAIR_PINS_NEG )
+	)
+
+	(Pin
+		(Name E)
+		(MSB )
+		(LSB )
+		(Type BIDIR)
+		(Location Right)
+		(InputLoadLow -0.01)
+		(InputLoadHigh 0.01)
+		(OutputLoadLow 1.0)
+		(OutputLoadHigh -1.0)
+		(CheckLoad Both)
+		(CheckIO Both)
+		(CheckDir 1)
+		(CheckAssert 1)
+		(CheckOutput 1)
+		(UnknownLoading 0)
+		(PinShape )
+		(DIFF_PAIR_PINS_POS )
+		(DIFF_PAIR_PINS_NEG )
+	)
+
+
+)
\ No newline at end of file
Index: trunk/librairies/polytech_ge/bornier_5/metadata/pdv_validation.txt
===================================================================
Index: trunk/librairies/polytech_ge/bornier_5/metadata/revision.dat
===================================================================
--- trunk/librairies/polytech_ge/bornier_5/metadata/revision.dat	(nonexistent)
+++ trunk/librairies/polytech_ge/bornier_5/metadata/revision.dat	(revision 214)
@@ -0,0 +1,250 @@
+(Cell	bornier_5
+
+	(RevisionInfoBlock	
+
+		(Baselined	0)
+
+		(Revision	0.0.1)
+
+		(ModificationStatus	NULL)
+
+		(Status	Created)
+
+		(ErrorStatus	0)
+
+		(CreateInfo	
+
+			(Time	10/15/10,16:50:45)
+
+			(User	avercruy)
+
+			(Path	_polytech_ge.bornier_5)
+
+		)
+
+		(LastModifyInfo	
+
+			(Time	10/15/10,16:52:20)
+
+			(User	avercruy)
+
+			(Path	_polytech_ge.bornier_5)
+
+		)
+
+	)
+
+	(Views	
+
+		(View	Symbol
+
+			(Symbols	1
+
+				(Symbol	sym_1
+
+					(Symbol_Type	Normal)
+
+					(Max_Size	0)
+
+					(Checksum	00000000060cb279)
+
+					(RevisionInfoBlock	
+
+						(Baselined	0)
+
+						(Revision	0.0.1)
+
+						(ModificationStatus	NULL)
+
+						(Status	Created)
+
+						(ErrorStatus	0)
+
+						(CreateInfo	
+
+							(Time	10/15/10,16:50:45)
+
+							(User	avercruy)
+
+							(Path	_polytech_ge.bornier_5)
+
+						)
+
+					)
+
+				)
+
+			)
+
+			(Checksum	000000001b9e037e)
+
+		)
+
+		(View	Chips
+
+			(Checksum	00000000c9608269)
+
+			(Primitives	2
+
+				(Primitive	BORNIER_5_THRU
+
+					(RevisionInfoBlock	
+
+						(Baselined	0)
+
+						(Revision	0.0.1)
+
+						(ModificationStatus	NULL)
+
+						(Status	Created)
+
+						(ErrorStatus	0)
+
+						(CreateInfo	
+
+							(Time	10/15/10,16:50:45)
+
+							(User	avercruy)
+
+							(Path	_polytech_ge.bornier_5)
+
+						)
+
+					)
+
+					(LogicalPhysicalPartRelation	
+
+						(LogicalPart	BORNIER_5
+
+							(PackType	BORNIER_5_THRU)
+
+						)
+
+					)
+
+					(Packages	1
+
+						(FunctionGroups	1
+
+							(FunctionGroup	1[1]
+
+								(Linkages	
+
+									(Linkage	Symbol
+
+										(Name	sym_1)
+
+									)
+
+								)
+
+							)
+
+						)
+
+						(Linkages	
+
+							(DefaultFootPrint	
+
+								(Name	SL5C)
+
+							)
+
+						)
+
+					)
+
+				)
+
+				(Primitive	BORNIER_5_MOLEX
+
+					(RevisionInfoBlock	
+
+						(Baselined	0)
+
+						(Revision	0.0.1)
+
+						(ModificationStatus	NULL)
+
+						(Status	Created)
+
+						(ErrorStatus	0)
+
+						(CreateInfo	
+
+							(Time	10/15/10,16:50:48)
+
+							(User	avercruy)
+
+							(Path	_polytech_ge.bornier_5)
+
+						)
+
+					)
+
+					(LogicalPhysicalPartRelation	
+
+						(LogicalPart	BORNIER_5
+
+							(PackType	BORNIER_5_MOLEX)
+
+						)
+
+					)
+
+					(Packages	1
+
+						(FunctionGroups	1
+
+							(FunctionGroup	1[1]
+
+								(Linkages	
+
+									(Linkage	Symbol
+
+										(Name	sym_1)
+
+									)
+
+								)
+
+							)
+
+						)
+
+						(Linkages	
+
+							(DefaultFootPrint	
+
+								(Name	bornier_5_molex)
+
+							)
+
+						)
+
+					)
+
+				)
+
+			)
+
+		)
+
+		(Checksum	000000001e4103ee)
+
+	)
+
+	(VersionInfoBlock	
+
+		(ToolName	PDV)
+
+		(Version	16.01-s021 (v16-1-53AR))
+
+		(License	PCB_design_expert)
+
+	)
+
+	(Checksum	000000001bd003a9)
+
+)
+
Index: trunk/librairies/polytech_ge/bornier_5/entity/master.tag
===================================================================
--- trunk/librairies/polytech_ge/bornier_5/entity/master.tag	(revision 213)
+++ trunk/librairies/polytech_ge/bornier_5/entity/master.tag	(revision 214)
@@ -1 +1 @@
-vhdl.vhd
+verilog.v
Index: trunk/librairies/polytech_ge_beta/pcb/ssop28.log,1
===================================================================
--- trunk/librairies/polytech_ge_beta/pcb/ssop28.log,1	(revision 213)
+++ trunk/librairies/polytech_ge_beta/pcb/ssop28.log,1	(nonexistent)
@@ -1,17 +0,0 @@
-(------------------------------------------------------------)
-(                                                            )
-(        Create Symbol of type PACKAGE                       )
-(                                                            )
-(        Drawing          : ssop28.dra                       )
-(        Software Version : 16.1p001                         )
-(        Date/Time        : Fri Oct 15 16:28:10 2010         )
-(                                                            )
-(------------------------------------------------------------)
-
-
-
-Create symbol started.
- 
-
-Create symbol completed.
-
Index: trunk/librairies/polytech_ge_beta/mcp9701/metadata/pinlist.txt
===================================================================
--- trunk/librairies/polytech_ge_beta/mcp9701/metadata/pinlist.txt	(nonexistent)
+++ trunk/librairies/polytech_ge_beta/mcp9701/metadata/pinlist.txt	(revision 214)
@@ -0,0 +1,66 @@
+(Pinlist
+	(Pin
+		(Name VDD)
+		(MSB )
+		(LSB )
+		(Type INPUT)
+		(Location Left)
+		(InputLoadLow -0.01)
+		(InputLoadHigh 0.01)
+		(OutputLoadLow )
+		(OutputLoadHigh )
+		(CheckLoad Both)
+		(CheckIO Both)
+		(CheckDir 1)
+		(CheckAssert 1)
+		(CheckOutput 1)
+		(UnknownLoading 0)
+		(PinShape )
+		(DIFF_PAIR_PINS_POS )
+		(DIFF_PAIR_PINS_NEG )
+	)
+
+	(Pin
+		(Name VOUT)
+		(MSB )
+		(LSB )
+		(Type OUTPUT)
+		(Location Right)
+		(InputLoadLow )
+		(InputLoadHigh )
+		(OutputLoadLow 1.0)
+		(OutputLoadHigh -1.0)
+		(CheckLoad Both)
+		(CheckIO Both)
+		(CheckDir 1)
+		(CheckAssert 1)
+		(CheckOutput 1)
+		(UnknownLoading 0)
+		(PinShape )
+		(DIFF_PAIR_PINS_POS )
+		(DIFF_PAIR_PINS_NEG )
+	)
+
+	(Pin
+		(Name GND)
+		(MSB )
+		(LSB )
+		(Type GROUND)
+		(Location Bottom)
+		(InputLoadLow )
+		(InputLoadHigh )
+		(OutputLoadLow )
+		(OutputLoadHigh )
+		(CheckLoad Off)
+		(CheckIO Off)
+		(CheckDir 0)
+		(CheckAssert 0)
+		(CheckOutput 0)
+		(UnknownLoading 0)
+		(PinShape )
+		(DIFF_PAIR_PINS_POS )
+		(DIFF_PAIR_PINS_NEG )
+	)
+
+
+)
\ No newline at end of file
Index: trunk/librairies/polytech_ge_beta/mcp9701/metadata/pdv_validation.txt
===================================================================
Index: trunk/librairies/polytech_ge_beta/mcp9701/metadata/revision.dat
===================================================================
--- trunk/librairies/polytech_ge_beta/mcp9701/metadata/revision.dat	(nonexistent)
+++ trunk/librairies/polytech_ge_beta/mcp9701/metadata/revision.dat	(revision 214)
@@ -0,0 +1,180 @@
+(Cell	mcp9701
+
+	(RevisionInfoBlock	
+
+		(Baselined	0)
+
+		(Revision	0.0.2)
+
+		(ModificationStatus	NULL)
+
+		(Status	Created)
+
+		(ErrorStatus	0)
+
+		(CreateInfo	
+
+			(Time	10/15/10,13:51:03)
+
+			(User	avercruy)
+
+			(Path	_polytech_ge_beta.mcp9701)
+
+		)
+
+		(LastModifyInfo	
+
+			(Time	10/15/10,14:17:23)
+
+			(User	avercruy)
+
+			(Path	_polytech_ge_beta.mcp9701)
+
+		)
+
+	)
+
+	(Views	
+
+		(View	Chips
+
+			(Checksum	000000009a1683e6)
+
+			(Primitives	1
+
+				(Primitive	MCP9701
+
+					(RevisionInfoBlock	
+
+						(Baselined	0)
+
+						(Revision	0.0.2)
+
+						(ModificationStatus	NULL)
+
+						(Status	Created)
+
+						(ErrorStatus	0)
+
+						(CreateInfo	
+
+							(Time	10/15/10,13:51:07)
+
+							(User	avercruy)
+
+							(Path	_polytech_ge_beta.mcp9701)
+
+						)
+
+					)
+
+					(LogicalPhysicalPartRelation	
+
+						(LogicalPart	MCP9701
+
+							(PackType	MCP9701)
+
+						)
+
+					)
+
+					(Packages	1
+
+						(FunctionGroups	1
+
+							(FunctionGroup	1[1]
+
+								(Linkages	
+
+									(Linkage	Symbol
+
+										(Name	sym_1)
+
+									)
+
+								)
+
+							)
+
+						)
+
+						(Linkages	
+
+							(DefaultFootPrint	
+
+								(Name	to92)
+
+							)
+
+						)
+
+					)
+
+				)
+
+			)
+
+		)
+
+		(View	Symbol
+
+			(Symbols	1
+
+				(Symbol	sym_1
+
+					(Symbol_Type	Normal)
+
+					(Max_Size	0)
+
+					(Checksum	000000001f586759)
+
+					(RevisionInfoBlock	
+
+						(Baselined	0)
+
+						(Revision	0.0.1)
+
+						(ModificationStatus	NULL)
+
+						(Status	Created)
+
+						(ErrorStatus	0)
+
+						(CreateInfo	
+
+							(Time	10/15/10,14:17:22)
+
+							(User	avercruy)
+
+							(Path	_polytech_ge_beta.mcp9701)
+
+						)
+
+					)
+
+				)
+
+			)
+
+			(Checksum	000000001e320417)
+
+		)
+
+		(Checksum	000000001b3c0348)
+
+	)
+
+	(VersionInfoBlock	
+
+		(ToolName	PDV)
+
+		(Version	16.01-s021 (v16-1-53AR))
+
+		(License	PCB_design_expert)
+
+	)
+
+	(Checksum	000000001c200379)
+
+)
+
Index: trunk/librairies/polytech_ge_beta/mcp9701/chips/master.tag
===================================================================
--- trunk/librairies/polytech_ge_beta/mcp9701/chips/master.tag	(nonexistent)
+++ trunk/librairies/polytech_ge_beta/mcp9701/chips/master.tag	(revision 214)
@@ -0,0 +1 @@
+chips.prt
Index: trunk/librairies/polytech_ge_beta/mcp9701/chips/chips.prt
===================================================================
--- trunk/librairies/polytech_ge_beta/mcp9701/chips/chips.prt	(nonexistent)
+++ trunk/librairies/polytech_ge_beta/mcp9701/chips/chips.prt	(revision 214)
@@ -0,0 +1,28 @@
+FILE_TYPE=LIBRARY_PARTS;
+primitive 'MCP9701';
+  pin
+    'VDD':
+      PIN_NUMBER='(3)';
+      INPUT_LOAD='(-0.01,0.01)';
+    'VOUT':
+      PIN_NUMBER='(2)';
+      OUTPUT_LOAD='(1.0,-1.0)';
+    'GND':
+      PIN_NUMBER='(1)';
+      PINUSE='GROUND';
+      NO_LOAD_CHECK='Both';
+      NO_IO_CHECK='Both';
+      NO_ASSERT_CHECK='TRUE';
+      NO_DIR_CHECK='TRUE';
+      ALLOW_CONNECT='TRUE';
+  end_pin;
+  body
+    PART_NAME='MCP9701';
+    BODY_NAME='MCP9701';
+    JEDEC_TYPE='to92';
+    PHYS_DES_PREFIX='U';
+    CLASS='IC';
+  end_body;
+end_primitive;
+
+END.
Index: trunk/librairies/polytech_ge_beta/mcp9701/sym_1/symbol_css.lck
===================================================================
--- trunk/librairies/polytech_ge_beta/mcp9701/sym_1/symbol_css.lck	(nonexistent)
+++ trunk/librairies/polytech_ge_beta/mcp9701/sym_1/symbol_css.lck	(revision 214)
@@ -0,0 +1 @@
+avercruy@2780
\ No newline at end of file
Index: trunk/librairies/polytech_ge_beta/mcp9701/sym_1/symbol.css
===================================================================
--- trunk/librairies/polytech_ge_beta/mcp9701/sym_1/symbol.css	(nonexistent)
+++ trunk/librairies/polytech_ge_beta/mcp9701/sym_1/symbol.css	(revision 214)
@@ -0,0 +1,16 @@
+C -200 0 "VDD" -225 0 0 1 29 0 R
+X "PIN_TEXT" "VDD" -115 0 0.00 0.00 23 0 0 0 0 0 1 0 0
+C 200 0 "VOUT" 225 0 0 1 29 0 L
+X "PIN_TEXT" "VOUT" 115 0 0.00 0.00 23 0 0 2 0 0 1 0 0
+C 0 -200 "GND" 0 -225 0 1 29 1 R
+X "PIN_TEXT" "GND" 0 -115 90.00 0.00 23 0 0 0 0 0 1 0 0
+L -125 -125 -125 125 -1 0
+L 125 -125 -125 -125 -1 0
+L -125 125 125 125 -1 0
+L 125 -125 125 125 -1 0
+L -200 0 -125 0 -1 0
+L 0 -200 0 -125 -1 0
+L 200 0 125 0 -1 0
+T 0 83 0.00 0.00 29 0 0 1 0 7 0
+mcp9701
+P "CDS_LMAN_SYM_OUTLINE" "-125,125,125,-125" 0 0 0.00 0.00 22 0 0 0 0 0 0 0 0
Index: trunk/librairies/polytech_ge_beta/mcp9701/entity/pc.db
===================================================================
--- trunk/librairies/polytech_ge_beta/mcp9701/entity/pc.db	(nonexistent)
+++ trunk/librairies/polytech_ge_beta/mcp9701/entity/pc.db	(revision 214)
@@ -0,0 +1 @@
+-- pcdb file, Rev:1.0 written by VAN 05.01-s01 on Oct 15, 2010  14:17:24
Index: trunk/librairies/polytech_ge_beta/mcp9701/entity/verilog.v
===================================================================
--- trunk/librairies/polytech_ge_beta/mcp9701/entity/verilog.v	(nonexistent)
+++ trunk/librairies/polytech_ge_beta/mcp9701/entity/verilog.v	(revision 214)
@@ -0,0 +1,14 @@
+// generated by newgenasym  Fri Oct 15 14:25:40 2010
+
+
+module mcp9701 (gnd, vdd, vout);
+    input gnd;
+    input vdd;
+    output vout;
+
+
+    initial
+        begin
+        end
+
+endmodule
Index: trunk/librairies/polytech_ge_beta/mcp9701/entity/vlog004u.sir
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: trunk/librairies/polytech_ge_beta/mcp9701/entity/vlog004u.sir
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: trunk/librairies/polytech_ge_beta/mcp9701/entity/vhdl.vhd
===================================================================
--- trunk/librairies/polytech_ge_beta/mcp9701/entity/vhdl.vhd	(nonexistent)
+++ trunk/librairies/polytech_ge_beta/mcp9701/entity/vhdl.vhd	(revision 214)
@@ -0,0 +1,11 @@
+-- generated by newgenasym Fri Oct 15 14:25:40 2010
+
+library ieee;
+use     ieee.std_logic_1164.all;
+use     work.all;
+entity MCP9701 is
+    port (    
+	GND:       IN     STD_LOGIC;    
+	VDD:       IN     STD_LOGIC;    
+	VOUT:      OUT    STD_LOGIC);
+end MCP9701;
