Travaux Pratiques » Polytech Ge SP4abc 2021

;*******************************************************************************

;

; C Compiler for M16C/80

; Copyright (C) 1999 (2000 - 2010) Renesas Electronics Corporation.

; and Renesas Solutions Corporation. All rights reserved.

;

;

; sect30.inc : section definition

; This program is applicable when using the basic I/O library

;

; $Date: 2005/10/12 07:54:36 $

; $Revision: 1.24 $

;

;******************************************************************************

;---------------------------------------------------------------

;

; Arrangement of section

;

;---------------------------------------------------------------

; Near RAM data area

;---------------------------------------------------------------

; SBDATA area

.section data_SE,DATA

.org 400H

data_SE_top:

; for NSD

.section data_MON1_SE,DATA

data_MON1_SE_top:

.section data_MON2_SE,DATA

data_MON2_SE_top:

.section data_MON3_SE,DATA

data_MON3_SE_top:

.section data_MON4_SE,DATA

data_MON4_SE_top:

.section bss_SE,DATA,ALIGN

bss_SE_top:

; for NSD

.section bss_MON1_SE,DATA,ALIGN

bss_MON1_SE_top:

.section bss_MON2_SE,DATA,ALIGN

bss_MON2_SE_top:

.section bss_MON3_SE,DATA,ALIGN

bss_MON3_SE_top:

.section bss_MON4_SE,DATA,ALIGN

bss_MON4_SE_top:

.section data_SO,DATA

data_SO_top:

; for NSD

.section data_MON1_SO,DATA

data_MON1_SO_top:

.section data_MON2_SO,DATA

data_MON2_SO_top:

.section data_MON3_SO,DATA

data_MON3_SO_top:

.section data_MON4_SO,DATA

data_MON4_SO_top:

.section bss_SO,DATA

bss_SO_top:

; for NSD

.section bss_MON1_SO,DATA

bss_MON1_SO_top:

.section bss_MON2_SO,DATA

bss_MON2_SO_top:

.section bss_MON3_SO,DATA

bss_MON3_SO_top:

.section bss_MON4_SO,DATA

bss_MON4_SO_top:

; near RAM area

.section data_NE,DATA,ALIGN

data_NE_top:

; for NSD

.section data_MON1_E,DATA,ALIGN

data_MON1_E_top:

.section data_MON2_E,DATA,ALIGN

data_MON2_E_top:

.section data_MON3_E,DATA,ALIGN

data_MON3_E_top:

.section data_MON4_E,DATA,ALIGN

data_MON4_E_top:

.section bss_NE,DATA,ALIGN

bss_NE_top:

; for NSD

.section bss_MON1_E,DATA,ALIGN

bss_MON1_E_top:

.section bss_MON2_E,DATA,ALIGN

bss_MON2_E_top:

.section bss_MON3_E,DATA,ALIGN

bss_MON3_E_top:

.section bss_MON4_E,DATA,ALIGN

bss_MON4_E_top:

.section data_NO,DATA

data_NO_top:

; for NSD

.section data_MON1_O,DATA

data_MON1_O_top:

.section data_MON2_O,DATA

data_MON2_O_top:

.section data_MON3_O,DATA

data_MON3_O_top:

.section data_MON4_O,DATA

data_MON4_O_top:

.section bss_NO,DATA

bss_NO_top:

; for NSD

.section bss_MON1_O,DATA

bss_MON1_O_top:

.section bss_MON2_O,DATA

bss_MON2_O_top:

.section bss_MON3_O,DATA

bss_MON3_O_top:

.section bss_MON4_O,DATA

bss_MON4_O_top:

;---------------------------------------------------------------

; Stack area

;---------------------------------------------------------------

.section stack,DATA,ALIGN

.blkb STACKSIZE

.align

stack_top:

.blkb ISTACKSIZE

.align

istack_top:

;---------------------------------------------------------------

; heap section

;---------------------------------------------------------------

.if __HEAP__ != 1

.section heap,DATA

heap_top:

.blkb HEAPSIZE

.endif

;---------------------------------------------------------------

; Near ROM data area

;---------------------------------------------------------------

.section rom_NE,ROMDATA,ALIGN

rom_NE_top:

.section rom_NO,ROMDATA

rom_NO_top:

;---------------------------------------------------------------

; Far RAM data area

;---------------------------------------------------------------

; SBDATA area for #pragma SB16DATA

; .section data_SE,DATA

; .org 10000H

;data_SE_top:

; for NSD

; .section data_MON1_SE,DATA

;data_MON1_SE_top:

; .section data_MON2_SE,DATA

;data_MON2_SE_top:

; .section data_MON3_SE,DATA

;data_MON3_SE_top:

; .section data_MON4_SE,DATA

;data_MON4_SE_top:

;

; .section bss_SE,DATA,ALIGN

;bss_SE_top:

; for NSD

; .section bss_MON1_SE,DATA,ALIGN

;bss_MON1_SE_top:

; .section bss_MON2_SE,DATA,ALIGN

;bss_MON2_SE_top:

; .section bss_MON3_SE,DATA,ALIGN

;bss_MON3_SE_top:

; .section bss_MON4_SE,DATA,ALIGN

;bss_MON4_SE_top:

;

; .section data_SO,DATA

;data_SO_top:

; for NSD

; .section data_MON1_SO,DATA

;data_MON1_SO_top:

; .section data_MON2_SO,DATA

;data_MON2_SO_top:

; .section data_MON3_SO,DATA

;data_MON3_SO_top:

; .section data_MON4_SO,DATA

;data_MON4_SO_top:

;

; .section bss_SO,DATA

;bss_SO_top:

; for NSD

; .section bss_MON1_SO,DATA

;bss_MON1_SO_top:

; .section bss_MON2_SO,DATA

;bss_MON2_SO_top:

; .section bss_MON3_SO,DATA

;bss_MON3_SO_top:

; .section bss_MON4_SO,DATA

;bss_MON4_SO_top:

;

; .section data_6E,DATA,ALIGN

;data_6E_top:

; for NSD

; .section data_MON1_6E,DATA,ALIGN

;data_MON1_6E_top:

; .section data_MON2_6E,DATA,ALIGN

;data_MON2_6E_top:

; .section data_MON3_6E,DATA,ALIGN

;data_MON3_6E_top:

; .section data_MON4_6E,DATA,ALIGN

;data_MON4_6E_top:

;

; .section bss_6E,DATA,ALIGN

;bss_6E_top:

; for NSD

; .section bss_MON1_6E,DATA,ALIGN

;bss_MON1_6E_top:

; .section bss_MON2_6E,DATA,ALIGN

;bss_MON2_6E_top:

; .section bss_MON3_6E,DATA,ALIGN

;bss_MON3_6E_top:

; .section bss_MON4_6E,DATA,ALIGN

;bss_MON4_6E_top:

;

; .section data_6O,DATA

;data_6O_top:

; for NSD

; .section data_MON1_6O,DATA

;data_MON1_6O_top:

; .section data_MON2_6O,DATA

;data_MON2_6O_top:

; .section data_MON3_6O,DATA

;data_MON3_6O_top:

; .section data_MON4_6O,DATA

;data_MON4_6O_top:

;

; .section bss_6O,DATA

;bss_6O_top:

; for NSD

; .section bss_MON1_6O,DATA

;bss_MON1_6O_top:

; .section bss_MON2_6O,DATA

;bss_MON2_6O_top:

; .section bss_MON3_6O,DATA

;bss_MON3_6O_top:

; .section bss_MON4_6O,DATA

;bss_MON4_6O_top:

;

.section data_FE,DATA

.org 20000H

data_FE_top:

; for NSD

; .section data_MON1_E,DATA

;data_MON1_E_top:

; .section data_MON2_E,DATA

;data_MON2_E_top:

; .section data_MON3_E,DATA

;data_MON3_E_top:

; .section data_MON4_E,DATA

;data_MON4_E_top:

.section bss_FE,DATA,ALIGN

bss_FE_top:

; for NSD

; .section bss_MON1_E,DATA,ALIGN

;bss_MON1_E_top:

; .section bss_MON2_E,DATA,ALIGN

;bss_MON2_E_top:

; .section bss_MON3_E,DATA,ALIGN

;bss_MON3_E_top:

; .section bss_MON4_E,DATA,ALIGN

;bss_MON4_E_top:

.section data_FO,DATA

data_FO_top:

; for NSD

; .section data_MON1_O,DATA

;data_MON1_O_top:

; .section data_MON2_O,DATA

;data_MON2_O_top:

; .section data_MON3_O,DATA

;data_MON3_O_top:

; .section data_MON4_O,DATA

;data_MON4_O_top:

.section bss_FO,DATA

bss_FO_top:

; for NSD

; .section bss_MON1_O,DATA

;bss_MON1_O_top:

; .section bss_MON2_O,DATA

;bss_MON2_O_top:

; .section bss_MON3_O,DATA

;bss_MON3_O_top:

; .section bss_MON4_O,DATA

;bss_MON4_O_top:

;---------------------------------------------------------------

; Far ROM data area

;---------------------------------------------------------------

.section rom_FE,ROMDATA

.org 0FE0000H

rom_FE_top:

.section rom_FO,ROMDATA

rom_FO_top:

;---------------------------------------------------------------

; Initial data of 'data' section

;---------------------------------------------------------------

.section data_SEI,ROMDATA

data_SEI_top:

; for NSD

.section data_MON1_SEI,ROMDATA

data_MON1_SEI_top:

.section data_MON2_SEI,ROMDATA

data_MON2_SEI_top:

.section data_MON3_SEI,ROMDATA

data_MON3_SEI_top:

.section data_MON4_SEI,ROMDATA

data_MON4_SEI_top:

.section data_SOI,ROMDATA

data_SOI_top:

; for NSD

.section data_MON1_SOI,ROMDATA

data_MON1_SOI_top:

.section data_MON2_SOI,ROMDATA

data_MON2_SOI_top:

.section data_MON3_SOI,ROMDATA

data_MON3_SOI_top:

.section data_MON4_SOI,ROMDATA

data_MON4_SOI_top:

; .section data_6EI,ROMDATA

;data_6EI_top:

; for NSD

; .section data_MON1_6EI,ROMDATA

;data_MON1_6EI_top:

; .section data_MON2_6EI,ROMDATA

;data_MON2_6EI_top:

; .section data_MON3_6EI,ROMDATA

;data_MON3_6EI_top:

; .section data_MON4_6EI,ROMDATA

;data_MON4_6EI_top:

;

; .section data_6OI,ROMDATA

;data_6OI_top:

; for NSD

; .section data_MON1_6OI,ROMDATA

;data_MON1_6OI_top:

; .section data_MON2_6OI,ROMDATA

;data_MON2_6OI_top:

; .section data_MON3_6OI,ROMDATA

;data_MON3_6OI_top:

; .section data_MON4_6OI,ROMDATA

;data_MON4_6OI_top:

.section data_NEI,ROMDATA

data_NEI_top:

; for NSD

.section data_MON1_EI,ROMDATA

data_MON1_EI_top:

.section data_MON2_EI,ROMDATA

data_MON2_EI_top:

.section data_MON3_EI,ROMDATA

data_MON3_EI_top:

.section data_MON4_EI,ROMDATA

data_MON4_EI_top:

.section data_NOI,ROMDATA

data_NOI_top:

; for NSD

.section data_MON1_OI,ROMDATA

data_MON1_OI_top:

.section data_MON2_OI,ROMDATA

data_MON2_OI_top:

.section data_MON3_OI,ROMDATA

data_MON3_OI_top:

.section data_MON4_OI,ROMDATA

data_MON4_OI_top:

.section data_FEI,ROMDATA

data_FEI_top:

; for NSD

; .section data_MON1_EI,ROMDATA

;data_MON1_EI_top:

; .section data_MON2_EI,ROMDATA

;data_MON2_EI_top:

; .section data_MON3_EI,ROMDATA

;data_MON3_EI_top:

; .section data_MON4_EI,ROMDATA

;data_MON4_EI_top:

.section data_FOI,ROMDATA

data_FOI_top:

; for NSD

; .section data_MON1_OI,ROMDATA

;data_MON1_OI_top:

; .section data_MON2_OI,ROMDATA

;data_MON2_OI_top:

; .section data_MON3_OI,ROMDATA

;data_MON3_OI_top:

; .section data_MON4_OI,ROMDATA

;data_MON4_OI_top:

;---------------------------------------------------------------

; code area

;---------------------------------------------------------------

.section interrupt,ALIGN

.section program,ALIGN

.section program_S

.org 0FF0000H

;---------------------------------------------------------------

; variable vector section

;---------------------------------------------------------------

.section vector,ROMDATA ; variable vector table

.org VECTOR_ADR

.if __MVT__ == 0

.lword dummy_int ; BRK (software int 0)

.lword dummy_int ;

.lword dummy_int ;

.lword dummy_int ;

.lword dummy_int ;

.lword dummy_int ;

.lword dummy_int ;

.lword dummy_int ;

.lword dummy_int ; DMA0 (software int 8)

.lword dummy_int ; DMA1 (software int 9)

.lword dummy_int ; DMA2 (software int 10)

.lword dummy_int ; DMA3 (software int 11)

.lword dummy_int ; TIMER A0 (software int 12)

.lword dummy_int ; TIMER A1 (software int 13)

.lword dummy_int ; TIMER A2 (software int 14)

.lword dummy_int ; TIMER A3 (software int 15)

.lword dummy_int ; TIMER A4 (software int 16)

.lword dummy_int ; uart0 trance (software int 17)

.lword dummy_int ; uart0 receive (software int 18)

.lword dummy_int ; uart1 trance (software int 19)

.lword dummy_int ; uart1 receive (software int 20)

.lword dummy_int ; TIMER B0 (software int 21)

.lword dummy_int ; TIMER B1 (software int 22)

.lword dummy_int ; TIMER B2 (software int 23)

.lword dummy_int ; TIMER B3 (software int 24)

.lword dummy_int ; TIMER B4 (software int 25)

.lword dummy_int ; INT5 (software int 26)

.lword dummy_int ; INT4 (software int 27)

.lword dummy_int ; INT3 (software int 28)

.lword dummy_int ; INT2 (software int 29)

.lword dummy_int ; INT1 (software int 30)

.lword dummy_int ; INT0 (software int 31)

.lword dummy_int ; TIMER B5 (software int 32)

.lword dummy_int ; uart2 trance/NACK (software int 33)

.lword dummy_int ; uart2 receive/ACK (software int 34)

.lword dummy_int ; uart3 trance/NACK (software int 35)

.lword dummy_int ; uart3 receive/ACK (software int 36)

.lword dummy_int ; uart4 trance/NACK (software int 37)

.lword dummy_int ; uart4 receive/ACK (software int 38)

.lword dummy_int ; uart2 bus collision (software int 39)

.lword dummy_int ; uart3 bus collision (software int 40)

.lword dummy_int ; uart4 bus collision (software int 41)

.lword dummy_int ; A-D Convert (software int 42)

.lword dummy_int ; input key (software int 43)

.lword dummy_int ; software int 44

.lword dummy_int ; software int 45

.lword dummy_int ; software int 46

.lword dummy_int ; software int 47

.lword dummy_int ; software int 48

.lword dummy_int ; software int 49

.lword dummy_int ; software int 50

.lword dummy_int ; software int 51

.lword dummy_int ; software int 52

.lword dummy_int ; software int 53

.lword dummy_int ; software int 54

.lword dummy_int ; software int 55

.lword dummy_int ; software int 56

.lword dummy_int ; software int 57

.lword dummy_int ; software int 58

.lword dummy_int ; software int 59

.lword dummy_int ; software int 60

.lword dummy_int ; software int 61

.lword dummy_int ; software int 62

.lword dummy_int ; software int 63

.endif ; __MVT__

;===============================================================

; fixed vector section

;---------------------------------------------------------------

.section svector,ROMDATA ; specialpage vector table

.if __MST__ == 0

.org SVECTOR_ADR

;===============================================================

; special page defination

;---------------------------------------------------------------

; macro is defined in ncrt0.a30

; Format: SPECIAL number

;

;---------------------------------------------------------------

; SPECIAL 255

; SPECIAL 254

; SPECIAL 253

; SPECIAL 252

; SPECIAL 251

; SPECIAL 250

; SPECIAL 249

; SPECIAL 248

; SPECIAL 247

; SPECIAL 246

; SPECIAL 245

; SPECIAL 244

; SPECIAL 243

; SPECIAL 242

; SPECIAL 241

; SPECIAL 240

; SPECIAL 239

; SPECIAL 238

; SPECIAL 237

; SPECIAL 236

; SPECIAL 235

; SPECIAL 234

; SPECIAL 233

; SPECIAL 232

; SPECIAL 231

; SPECIAL 230

; SPECIAL 229

; SPECIAL 228

; SPECIAL 227

; SPECIAL 226

; SPECIAL 225

; SPECIAL 224

; SPECIAL 223

; SPECIAL 222

; SPECIAL 221

; SPECIAL 220

; SPECIAL 219

; SPECIAL 218

; SPECIAL 217

; SPECIAL 216

; SPECIAL 215

; SPECIAL 214

; SPECIAL 213

; SPECIAL 212

; SPECIAL 211

; SPECIAL 210

; SPECIAL 209

; SPECIAL 208

; SPECIAL 207

; SPECIAL 206

; SPECIAL 205

; SPECIAL 204

; SPECIAL 203

; SPECIAL 202

; SPECIAL 201

; SPECIAL 200

; SPECIAL 199

; SPECIAL 198

; SPECIAL 197

; SPECIAL 196

; SPECIAL 195

; SPECIAL 194

; SPECIAL 193

; SPECIAL 192

; SPECIAL 191

; SPECIAL 190

; SPECIAL 189

; SPECIAL 188

; SPECIAL 187

; SPECIAL 186

; SPECIAL 185

; SPECIAL 184

; SPECIAL 183

; SPECIAL 182

; SPECIAL 181

; SPECIAL 180

; SPECIAL 179

; SPECIAL 178

; SPECIAL 177

; SPECIAL 176

; SPECIAL 175

; SPECIAL 174

; SPECIAL 173

; SPECIAL 172

; SPECIAL 171

; SPECIAL 170

; SPECIAL 169

; SPECIAL 168

; SPECIAL 167

; SPECIAL 166

; SPECIAL 165

; SPECIAL 164

; SPECIAL 163

; SPECIAL 162

; SPECIAL 161

; SPECIAL 160

; SPECIAL 159

; SPECIAL 158

; SPECIAL 157

; SPECIAL 156

; SPECIAL 155

; SPECIAL 154

; SPECIAL 153

; SPECIAL 152

; SPECIAL 151

; SPECIAL 150

; SPECIAL 149

; SPECIAL 148

; SPECIAL 147

; SPECIAL 146

; SPECIAL 145

; SPECIAL 144

; SPECIAL 143

; SPECIAL 142

; SPECIAL 141

; SPECIAL 140

; SPECIAL 139

; SPECIAL 138

; SPECIAL 137

; SPECIAL 136

; SPECIAL 135

; SPECIAL 134

; SPECIAL 133

; SPECIAL 132

; SPECIAL 131

; SPECIAL 130

; SPECIAL 129

; SPECIAL 128

; SPECIAL 127

; SPECIAL 126

; SPECIAL 125

; SPECIAL 124

; SPECIAL 123

; SPECIAL 122

; SPECIAL 121

; SPECIAL 120

; SPECIAL 119

; SPECIAL 118

; SPECIAL 117

; SPECIAL 116

; SPECIAL 115

; SPECIAL 114

; SPECIAL 113

; SPECIAL 112

; SPECIAL 111

; SPECIAL 110

; SPECIAL 109

; SPECIAL 108

; SPECIAL 107

; SPECIAL 106

; SPECIAL 105

; SPECIAL 104

; SPECIAL 103

; SPECIAL 102

; SPECIAL 101

; SPECIAL 100

; SPECIAL 99

; SPECIAL 98

; SPECIAL 97

; SPECIAL 96

; SPECIAL 95

; SPECIAL 94

; SPECIAL 93

; SPECIAL 92

; SPECIAL 91

; SPECIAL 90

; SPECIAL 89

; SPECIAL 88

; SPECIAL 87

; SPECIAL 86

; SPECIAL 85

; SPECIAL 84

; SPECIAL 83

; SPECIAL 82

; SPECIAL 81

; SPECIAL 80

; SPECIAL 79

; SPECIAL 78

; SPECIAL 77

; SPECIAL 76

; SPECIAL 75

; SPECIAL 74

; SPECIAL 73

; SPECIAL 72

; SPECIAL 71

; SPECIAL 70

; SPECIAL 69

; SPECIAL 68

; SPECIAL 67

; SPECIAL 66

; SPECIAL 65

; SPECIAL 64

; SPECIAL 63

; SPECIAL 62

; SPECIAL 61

; SPECIAL 60

; SPECIAL 59

; SPECIAL 58

; SPECIAL 57

; SPECIAL 56

; SPECIAL 55

; SPECIAL 54

; SPECIAL 53

; SPECIAL 52

; SPECIAL 51

; SPECIAL 50

; SPECIAL 49

; SPECIAL 48

; SPECIAL 47

; SPECIAL 46

; SPECIAL 45

; SPECIAL 44

; SPECIAL 43

; SPECIAL 42

; SPECIAL 41

; SPECIAL 40

; SPECIAL 39

; SPECIAL 38

; SPECIAL 37

; SPECIAL 36

; SPECIAL 35

; SPECIAL 34

; SPECIAL 33

; SPECIAL 32

; SPECIAL 31

; SPECIAL 30

; SPECIAL 29

; SPECIAL 28

; SPECIAL 27

; SPECIAL 26

; SPECIAL 25

; SPECIAL 24

; SPECIAL 23

; SPECIAL 22

; SPECIAL 21

; SPECIAL 20

; SPECIAL 19

; SPECIAL 18

;

.endif ; __MST__

;===============================================================

; fixed vector section

;---------------------------------------------------------------

.section fvector,ROMDATA

.org 0FFFFDCh

UDI:

.lword dummy_int

OVER_FLOW:

.lword dummy_int

BRKI:

.lword dummy_int

ADDRESS_MATCH:

.lword dummy_int

SINGLE_STEP:

.lword dummy_int

WDT:

.lword dummy_int

DBC:

.lword dummy_int

NMI:

.lword dummy_int

RESET:

.lword start

;

;*******************************************************************************

;

; C Compiler for M16C/80

; Copyright (C) 1999 (2000 - 2010) Renesas Electronics Corporation.

; and Renesas Solutions Corporation. All rights reserved.

;

;

;*******************************************************************************

/***********************************************************************/

/* */

/* FILE :UART_Project.c */

/* DATE :Tue, Jun 01, 2021 */

/* DESCRIPTION :main program file. */

/* CPU GROUP :87B */

/* */

/* This file is generated by Renesas Project Generator (Ver.4.18). */

/* NOTE:THIS IS A TYPICAL EXAMPLE. */

/***********************************************************************/

void main(void)

{

}

[HIMDBVersion]

2.0

[DATABASE_VERSION]

"2.3"

[SESSION_DETAILS]

""

[INFORMATION]

""

[GENERAL_DATA]

"RESET_CPU_AFTER_DOWNLOAD_TAG" "VARIANT_TRUE_STORE_TAG"

[LANGUAGE]

"English"

[CONFIG_INFO_VD1]

0

[CONFIG_INFO_VD2]

0

[CONFIG_INFO_VD3]

0

[CONFIG_INFO_VD4]

0

[WINDOW_POSITION_STATE_DATA_VD1]

[WINDOW_POSITION_STATE_DATA_VD2]

[WINDOW_POSITION_STATE_DATA_VD3]

[WINDOW_POSITION_STATE_DATA_VD4]

[WINDOW_Z_ORDER]

[TARGET_NAME]

"M32C Simulator" "" 0

[STATUSBAR_STATEINFO_VD1]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_STATEINFO_VD2]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_STATEINFO_VD3]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_STATEINFO_VD4]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_DEBUGGER_PANESTATE_VD1]

[STATUSBAR_DEBUGGER_PANESTATE_VD2]

[STATUSBAR_DEBUGGER_PANESTATE_VD3]

[STATUSBAR_DEBUGGER_PANESTATE_VD4]

[DEBUGGER_OPTIONS]

"Unknown Options"

[DOWNLOAD_MODULES]

"$(CONFIGDIR)\$(PROJECTNAME).x30" 0 "IEEE695_RENESAS" 0 0 1 0

[CONNECT_ON_GO]

"FALSE"

[DOWNLOAD_MODULES_AFTER_BUILD]

"TRUE"

[REMOVE_BREAKPOINTS_ON_DOWNLOAD]

"TRUE"

[DISABLE_MEMORY_ACCESS_PRIOR_TO_COMMAND_FILE_EXECUTION]

"FALSE"

[LIMIT_DISASSEMBLY_MEMORY_ACCESS]

"FALSE"

[DISABLE_MEMORY_ACCESS_DURING_EXECUTION]

"FALSE"

[DEBUGGER_OPTIONS_PROPERTIES]

"1"

[COMMAND_FILES]

[DEFAULT_DEBUG_FORMAT]

""

[FLASH_DETAILS]

"" 0 0 "" 0 "" 0 0 "" 0 0 0 0 0 0 0 "" "" "" "" ""

[BREAKPOINTS]

[END]

[HIMDBVersion]

2.0

[DATABASE_VERSION]

"2.3"

[SESSION_DETAILS]

""

[INFORMATION]

""

[GENERAL_DATA]

"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlECX_MAP_FIND_SYMBOL_LIST" ""

"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlViews" "0"

"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBatchFileName" ""

"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBreakpointFlag" "-1 "

"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBreakpointStatus" "-1 "

"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBrowseDirectory" ""

"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlLogFileName" ""

"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlSplitterPosition" "242"

"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlViews" "0"

"{313F4FC1-6566-11D5-8BBE-0004E2013C71}TclTkCtrlLogFileName" ""

"{6C4D5B81-FD67-46A9-A089-EA44DCDE47FD}RAMMonitorManagerCtrlBlockInfoFileDir" ""

"{6C4D5B81-FD67-46A9-A089-EA44DCDE47FD}RAMMonitorManagerCtrlBlockInfoFileName" ""

"{7943C44E-7D44-422A-9140-4CF55C88F7D3}DifferenceCtrlViews" "0"

[LANGUAGE]

"English"

[CONFIG_INFO_VD1]

1

[CONFIG_INFO_VD2]

0

[CONFIG_INFO_VD3]

0

[CONFIG_INFO_VD4]

0

[WINDOW_POSITION_STATE_DATA_VD1]

"Help" "TOOLBAR 0" 59419 1 5 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_00000001_OUTPUT}" "WINDOW" 59422 0 0 "1.00" 180 534 287 350 200 18 0 "36756|36757|36758|36759|<<separator>>|36746|36747|<<separator>>|39531|<<separator>>|39500|39534|<<separator>>|36687" "0.0"

"{WK_00000002_WORKSPACE}" "WINDOW" 59420 0 0 "1.00" 180 534 287 350 200 18 0 "" "0.0"

"{WK_TB00000001_STANDARD}" "TOOLBAR 0" 59419 0 2 "0.00" 0 0 0 0 0 18 0 "" "0.0"

"{WK_TB00000002_EDITOR}" "TOOLBAR 0" 59419 0 0 "0.00" 0 0 0 0 0 18 0 "" "0.0"

"{WK_TB00000003_BOOKMARKS}" "TOOLBAR 0" 59419 1 1 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000004_TEMPLATES}" "TOOLBAR 0" 59419 1 0 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000005_SEARCH}" "TOOLBAR 0" 59419 0 1 "0.00" 0 0 0 0 0 18 0 "" "0.0"

"{WK_TB00000007_DEBUG}" "TOOLBAR 0" 59419 2 0 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000008_DEBUGRUN}" "TOOLBAR 0" 59419 2 1 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000009_VERSIONCONTROL}" "TOOLBAR 0" 59419 1 3 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000012_MAP}" "TOOLBAR 0" 59419 1 4 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000018_DEFAULTWINDOW}" "TOOLBAR 0" 59419 1 2 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000026_MACRO}" "TOOLBAR 0" 59419 1 6 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000028_RTOSDEBUG}" "TOOLBAR 0" 59419 2 2 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000029_SYSTEMTOOL}" "TOOLBAR 0" 59419 2 3 "0.00" 0 0 0 0 0 17 0 "" "0.0"

[WINDOW_POSITION_STATE_DATA_VD2]

[WINDOW_POSITION_STATE_DATA_VD3]

[WINDOW_POSITION_STATE_DATA_VD4]

[WINDOW_Z_ORDER]

"D:\TP_SP4_2021_Guer\sp4c12\UART_Project\UART_Project\UART_Project.c"

[TARGET_NAME]

"" "" 1182035557

[STATUSBAR_STATEINFO_VD1]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_STATEINFO_VD2]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_STATEINFO_VD3]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_STATEINFO_VD4]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_DEBUGGER_PANESTATE_VD1]

[STATUSBAR_DEBUGGER_PANESTATE_VD2]

[STATUSBAR_DEBUGGER_PANESTATE_VD3]

[STATUSBAR_DEBUGGER_PANESTATE_VD4]

[DEBUGGER_OPTIONS]

""

[DOWNLOAD_MODULES]

[CONNECT_ON_GO]

"FALSE"

[DOWNLOAD_MODULES_AFTER_BUILD]

"TRUE"

[REMOVE_BREAKPOINTS_ON_DOWNLOAD]

"FALSE"

[DISABLE_MEMORY_ACCESS_PRIOR_TO_COMMAND_FILE_EXECUTION]

"FALSE"

[LIMIT_DISASSEMBLY_MEMORY_ACCESS]

"FALSE"

[DISABLE_MEMORY_ACCESS_DURING_EXECUTION]

"FALSE"

[DEBUGGER_OPTIONS_PROPERTIES]

"1"

[COMMAND_FILES]

[DEFAULT_DEBUG_FORMAT]

""

[FLASH_DETAILS]

"" 0 0 "" 0 "" 0 0 "" 0 0 0 0 0 0 0 "" "" "" "" ""

[BREAKPOINTS]

[END]

[EMULATOR_SETTING]

HIDE_DIALOG=0

[RESET_RELEASE]

ENABLE=0

[CPU_SELECT]

DEVICE=M30879FL

EMUSEL=0

MCU_GROUP=M32C__87 Group

[POWER_SUPPLY]

VOLTAGE_5_0=0

VOLTAGE_3_3=0

[FW_LOCATE]

FWADDRESS=fff0

RAMADDRESS=c3

[WDT]

WDT_USE=0

[MCU_SETTING]

PROCESSOR_MODE=0

[COMMUNI]

COMSPEED=8

[Driver Configuration]

Renesas Communications=USB interface,0,

[Target]

M32C E8a SYSTEM=Renesas Communications

[HIMDBVersion]

2.0

[DATABASE_VERSION]

"2.3"

[SESSION_DETAILS]

""

[INFORMATION]

""

[GENERAL_DATA]

"RESET_CPU_AFTER_DOWNLOAD_TAG" "VARIANT_TRUE_STORE_TAG"

[LANGUAGE]

"English"

[CONFIG_INFO_VD1]

0

[CONFIG_INFO_VD2]

0

[CONFIG_INFO_VD3]

0

[CONFIG_INFO_VD4]

0

[WINDOW_POSITION_STATE_DATA_VD1]

[WINDOW_POSITION_STATE_DATA_VD2]

[WINDOW_POSITION_STATE_DATA_VD3]

[WINDOW_POSITION_STATE_DATA_VD4]

[WINDOW_Z_ORDER]

[TARGET_NAME]

"M32C E8a SYSTEM" "" 0

[STATUSBAR_STATEINFO_VD1]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_STATEINFO_VD2]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_STATEINFO_VD3]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_STATEINFO_VD4]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_DEBUGGER_PANESTATE_VD1]

[STATUSBAR_DEBUGGER_PANESTATE_VD2]

[STATUSBAR_DEBUGGER_PANESTATE_VD3]

[STATUSBAR_DEBUGGER_PANESTATE_VD4]

[DEBUGGER_OPTIONS]

"Unknown Options"

[DOWNLOAD_MODULES]

"$(CONFIGDIR)\$(PROJECTNAME).x30" 0 "IEEE695_RENESAS" 0 0 1 0

[CONNECT_ON_GO]

"FALSE"

[DOWNLOAD_MODULES_AFTER_BUILD]

"TRUE"

[REMOVE_BREAKPOINTS_ON_DOWNLOAD]

"FALSE"

[DISABLE_MEMORY_ACCESS_PRIOR_TO_COMMAND_FILE_EXECUTION]

"FALSE"

[LIMIT_DISASSEMBLY_MEMORY_ACCESS]

"FALSE"

[DISABLE_MEMORY_ACCESS_DURING_EXECUTION]

"FALSE"

[DEBUGGER_OPTIONS_PROPERTIES]

"1"

[COMMAND_FILES]

[DEFAULT_DEBUG_FORMAT]

""

[FLASH_DETAILS]

"" 0 0 "" 0 "" 0 0 "" 0 0 0 0 0 0 0 "" "" "" "" ""

[BREAKPOINTS]

[END]

;*******************************************************************************

;

; C COMPILER for M16C/80

; Copyright (C) 1999 (2000 - 2010) Renesas Electronics Corporation.

; and Renesas Solutions Corporation. All rights reserved.

;

;

; ncrt0.a30 : NC308 startup program

;

; This program is applicable when using the basic I/O library

;

; $Date: 2005/10/12 11:03:05 $

; $Revision: 1.30 $

;

;*******************************************************************************

;---------------------------------------------------------------------

; HEEP SIZE definition

;---------------------------------------------------------------------

.if __HEAP__ == 1 ; for HEW

HEAPSIZE .equ 0h

.else

.if __HEAPSIZE__ == 0

HEAPSIZE .equ 300h

.else ; for HEW

HEAPSIZE .equ __HEAPSIZE__

.endif

.endif

;---------------------------------------------------------------------

; STACK SIZE definition

;---------------------------------------------------------------------

.if __USTACKSIZE__ == 0

STACKSIZE .equ 300h

.else ; for HEW

STACKSIZE .equ __USTACKSIZE__

.endif

;---------------------------------------------------------------------

; INTERRUPT STACK SIZE definition

;---------------------------------------------------------------------

.if __ISTACKSIZE__ == 0

ISTACKSIZE .equ 300h

.else ; for HEW

ISTACKSIZE .equ __ISTACKSIZE__

.endif

;---------------------------------------------------------------------

; INTERRUPT VECTOR ADDRESS definition

;---------------------------------------------------------------------

VECTOR_ADR .equ 0fffd00h

SVECTOR_ADR .equ 0fffe00h

;---------------------------------------------------------------

; special page definition

;---------------------------------------------------------------

; macro define for special page

;

;Format:

; SPECIAL number

;

SPECIAL .macro NUM

.org 0FFFFFEH-(NUM*2)

.glb __SPECIAL_@NUM

.word __SPECIAL_@NUM & 0FFFFH

.endm

;---------------------------------------------------------------------

; Section allocation

;---------------------------------------------------------------------

.list OFF

.include sect308.inc

.list ON

;---------------------------------------------------------------------

; SBDATA area definition

;---------------------------------------------------------------------

.glb __SB__

__SB__ .equ data_SE_top

;====================================================================

; Initialize Macro declaration

;---------------------------------------------------------------------

;

; when copy less 64K byte

BZERO .macro TOP_ ,SECT_

mov.b #00H, R0L

mov.l #TOP_, A1

mov.w #sizeof SECT_ , R3

sstr.b

.endm

BCOPY .macro FROM_,TO_,SECT_

mov.l #FROM_ ,A0

mov.l #TO_ ,A1

mov.w #sizeof SECT_ , R3

smovf.b

.endm

; when copy over 64K byte

;BZEROL .macro TOP_,SECT_

; push.w #sizeof SECT_ >> 16

; push.w #sizeof SECT_ & 0ffffh

; pusha TOP_

; .stk 8

;

; .glb _bzero

; .call _bzero,G

; jsr.a _bzero

; .endm

;

;

;BCOPYL .macro FROM_ ,TO_ ,SECT_

; push.w #sizeof SECT_ >> 16

; push.w #sizeof SECT_ & 0ffffh

; pusha TO_

; pusha FROM_

; .stk 12

;

; .glb _bcopy

; .call _bcopy,G

; jsr.a _bcopy

; .endm

;

;====================================================================

; Interrupt section start

;---------------------------------------------------------------------

.insf start,S,0

.glb start

.section interrupt

start:

;---------------------------------------------------------------------

; after reset,this program will start

;---------------------------------------------------------------------

ldc #istack_top, isp ;set istack pointer

mov.b #02h,0ah

mov.b #00h,04h ;set processer mode

mov.b #00h,0ah

ldc #0080h, flg

ldc #stack_top, sp ;set stack pointer

ldc #data_SE_top, sb ;set sb register

fset b ;switch to bank 1

ldc #data_SE_top, sb ;set sb register

fclr b ;switch to bank 0

ldc #VECTOR_ADR,intb

;====================================================================

; NEAR area initialize.

;--------------------------------------------------------------------

; bss zero clear

;--------------------------------------------------------------------

BZERO bss_SE_top,bss_SE

BZERO bss_SO_top,bss_SO

BZERO bss_NE_top,bss_NE

BZERO bss_NO_top,bss_NO

; for NSD

BZERO bss_MON1_SE_top,bss_MON1_SE

BZERO bss_MON2_SE_top,bss_MON2_SE

BZERO bss_MON3_SE_top,bss_MON3_SE

BZERO bss_MON4_SE_top,bss_MON4_SE

BZERO bss_MON1_SO_top,bss_MON1_SO

BZERO bss_MON2_SO_top,bss_MON2_SO

BZERO bss_MON3_SO_top,bss_MON3_SO

BZERO bss_MON4_SO_top,bss_MON4_SO

BZERO bss_MON1_E_top,bss_MON1_E

BZERO bss_MON2_E_top,bss_MON2_E

BZERO bss_MON3_E_top,bss_MON3_E

BZERO bss_MON4_E_top,bss_MON4_E

BZERO bss_MON1_O_top,bss_MON1_O

BZERO bss_MON2_O_top,bss_MON2_O

BZERO bss_MON3_O_top,bss_MON3_O

BZERO bss_MON4_O_top,bss_MON4_O

;---------------------------------------------------------------------

; initialize data section

;---------------------------------------------------------------------

BCOPY data_SEI_top,data_SE_top,data_SE

BCOPY data_SOI_top,data_SO_top,data_SO

BCOPY data_NEI_top,data_NE_top,data_NE

BCOPY data_NOI_top,data_NO_top,data_NO

; for NSD

BCOPY data_MON1_SEI_top,data_MON1_SE_top,data_MON1_SE

BCOPY data_MON2_SEI_top,data_MON2_SE_top,data_MON2_SE

BCOPY data_MON3_SEI_top,data_MON3_SE_top,data_MON3_SE

BCOPY data_MON4_SEI_top,data_MON4_SE_top,data_MON4_SE

BCOPY data_MON1_SOI_top,data_MON1_SO_top,data_MON1_SO

BCOPY data_MON2_SOI_top,data_MON2_SO_top,data_MON2_SO

BCOPY data_MON3_SOI_top,data_MON3_SO_top,data_MON3_SO

BCOPY data_MON4_SOI_top,data_MON4_SO_top,data_MON4_SO

BCOPY data_MON1_EI_top,data_MON1_E_top,data_MON1_E

BCOPY data_MON2_EI_top,data_MON2_E_top,data_MON2_E

BCOPY data_MON3_EI_top,data_MON3_E_top,data_MON3_E

BCOPY data_MON4_EI_top,data_MON4_E_top,data_MON4_E

BCOPY data_MON1_OI_top,data_MON1_O_top,data_MON1_O

BCOPY data_MON2_OI_top,data_MON2_O_top,data_MON2_O

BCOPY data_MON3_OI_top,data_MON3_O_top,data_MON3_O

BCOPY data_MON4_OI_top,data_MON4_O_top,data_MON4_O

;====================================================================

; FAR area initialize.

;---------------------------------------------------------------------

; bss zero clear

;---------------------------------------------------------------------

; BZERO bss_SE_top,bss_SE

; BZERO bss_SO_top,bss_SO

; BZERO bss_6E_top,bss_6E

; BZERO bss_6O_top,bss_6O

BZERO bss_FE_top,bss_FE

BZERO bss_FO_top,bss_FO

; for NSD

; BZERO bss_MON1_SE_top,bss_MON1_SE

; BZERO bss_MON2_SE_top,bss_MON2_SE

; BZERO bss_MON3_SE_top,bss_MON3_SE

; BZERO bss_MON4_SE_top,bss_MON4_SE

;

; BZERO bss_MON1_SO_top,bss_MON1_SO

; BZERO bss_MON2_SO_top,bss_MON2_SO

; BZERO bss_MON3_SO_top,bss_MON3_SO

; BZERO bss_MON4_SO_top,bss_MON4_SO

;

; BZERO bss_MON1_6E_top,bss_MON1_6E

; BZERO bss_MON2_6E_top,bss_MON2_6E

; BZERO bss_MON3_6E_top,bss_MON3_6E

; BZERO bss_MON4_6E_top,bss_MON4_6E

;

; BZERO bss_MON1_6O_top,bss_MON1_6O

; BZERO bss_MON2_6O_top,bss_MON2_6O

; BZERO bss_MON3_6O_top,bss_MON3_6O

; BZERO bss_MON4_6O_top,bss_MON4_6O

;

; BZERO bss_MON1_E_top,bss_MON1_E

; BZERO bss_MON2_E_top,bss_MON2_E

; BZERO bss_MON3_E_top,bss_MON3_E

; BZERO bss_MON4_E_top,bss_MON4_E

;

; BZERO bss_MON1_O_top,bss_MON1_O

; BZERO bss_MON2_O_top,bss_MON2_O

; BZERO bss_MON3_O_top,bss_MON3_O

; BZERO bss_MON4_O_top,bss_MON4_O

;---------------------------------------------------------------------

; Copy edata_E(O) section from edata_EI(OI) section

;---------------------------------------------------------------------

; BCOPY data_SEI_top,data_SE_top,data_SE

; BCOPY data_SOI_top,data_SO_top,data_SO

; BCOPY data_6EI_top,data_6E_top,data_6E

; BCOPY data_6OI_top,data_6O_top,data_6O

BCOPY data_FEI_top,data_FE_top,data_FE

BCOPY data_FOI_top,data_FO_top,data_FO

; for NSD

; BCOPY data_MON1_SEI_top,data_MON1_SE_top,data_MON1_SE

; BCOPY data_MON2_SEI_top,data_MON2_SE_top,data_MON2_SE

; BCOPY data_MON3_SEI_top,data_MON3_SE_top,data_MON3_SE

; BCOPY data_MON4_SEI_top,data_MON4_SE_top,data_MON4_SE

;

; BCOPY data_MON1_SOI_top,data_MON1_SO_top,data_MON1_SO

; BCOPY data_MON2_SOI_top,data_MON2_SO_top,data_MON2_SO

; BCOPY data_MON3_SOI_top,data_MON3_SO_top,data_MON3_SO

; BCOPY data_MON4_SOI_top,data_MON4_SO_top,data_MON4_SO

;

; BCOPY data_MON1_6EI_top,data_MON1_6E_top,data_MON1_6E

; BCOPY data_MON2_6EI_top,data_MON2_6E_top,data_MON2_6E

; BCOPY data_MON3_6EI_top,data_MON3_6E_top,data_MON3_6E

; BCOPY data_MON4_6EI_top,data_MON4_6E_top,data_MON4_6E

;

; BCOPY data_MON1_6OI_top,data_MON1_6O_top,data_MON1_6O

; BCOPY data_MON2_6OI_top,data_MON2_6O_top,data_MON2_6O

; BCOPY data_MON3_6OI_top,data_MON3_6O_top,data_MON3_6O

; BCOPY data_MON4_6OI_top,data_MON4_6O_top,data_MON4_6O

;

; BCOPY data_MON1_EI_top,data_MON1_E_top,data_MON1_E

; BCOPY data_MON2_EI_top,data_MON2_E_top,data_MON2_E

; BCOPY data_MON3_EI_top,data_MON3_E_top,data_MON3_E

; BCOPY data_MON4_EI_top,data_MON4_E_top,data_MON4_E

;

; BCOPY data_MON1_OI_top,data_MON1_O_top,data_MON1_O

; BCOPY data_MON2_OI_top,data_MON2_O_top,data_MON2_O

; BCOPY data_MON3_OI_top,data_MON3_O_top,data_MON3_O

; BCOPY data_MON4_OI_top,data_MON4_O_top,data_MON4_O

ldc #stack_top,sp

; .stk -?? ; Validate this when use BZEROL,BCOPYL

;====================================================================

; heap area initialize

;---------------------------------------------------------------------

.if __HEAP__ != 1

.glb __mnext

.glb __msize

mov.l #(heap_top&0FFFFFFH), __mnext

mov.l #(HEAPSIZE&0FFFFFFH), __msize

.endif

;====================================================================

; Initialize standard I/O

;---------------------------------------------------------------------

.if __STANDARD_IO__ == 1

.glb __init

.call __init,G

jsr.a __init

.endif

;====================================================================

; Call main() function

;---------------------------------------------------------------------

ldc #0h,fb ; for debuger

.glb _main

jsr.a _main

;====================================================================

; exit() function

;---------------------------------------------------------------------

.glb _exit

.glb $exit

_exit: ; End program

$exit:

jmp _exit

.einsf

;====================================================================

; dummy interrupt function

;---------------------------------------------------------------------

.glb dummy_int

dummy_int:

reit

.end

;*******************************************************************************

;

; C COMPILER for M16C/80

; Copyright (C) 1999 (2000 - 2010) Renesas Electronics Corporation.

; and Renesas Solutions Corporation. All rights reserved.

;

;

;*******************************************************************************

[HIMDBVersion]

2.0

[DATABASE_VERSION]

"2.8"

[PROJECT_DETAILS]

"UART_Project" "D:\TP_SP4_2021_Guer\sp4c12\UART_Project\UART_Project" "D:\TP_SP4_2021_Guer\sp4c12\UART_Project\UART_Project\UART_Project.hwp" "M16C/80,M32C" "Renesas M32C Standard" "Application" "M32C/80" "M32C/87(M32C/87B)"

[INFORMATION]

"No project information available"

[TOOL_CHAIN]

"Renesas M32C Standard Toolchain" "5.42.00"

[CONFIGURATIONS]

"Debug" "D:\TP_SP4_2021_Guer\sp4c12\UART_Project\UART_Project\Debug"

"Debug_M32C_E8a_SYSTEM" "D:\TP_SP4_2021_Guer\sp4c12\UART_Project\UART_Project\Debug_M32C_E8a_SYSTEM"

"Debug_M32C_Simulator" "D:\TP_SP4_2021_Guer\sp4c12\UART_Project\UART_Project\Debug_M32C_Simulator"

"Release" "D:\TP_SP4_2021_Guer\sp4c12\UART_Project\UART_Project\Release"

[BUILD_PHASES]

"Renesas M32C Assembler" 1

"Renesas M32C C Compiler" 1

"Renesas M32C Configurator" 1

"Renesas M32C Librarian" 1

"Renesas M32C Linker" 1

"Renesas M32C Stype Converter" 1

[TOOL_ENVIRONMENT]

[EXTENSIONS]

"Absolute file" "X30"

"Absolute list file" "ALS"

"Assembler error tag file" "ATG"