root/branch/beaufour/sp4c12/SP4c12/SP4c12.c @ 724
| 723 | albeaufour | /***********************************************************************/
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/* */
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/* FILE :SP4c12.c */
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/* DATE :Wed, Jun 02, 2021 */
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/* DESCRIPTION :main program file. */
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/* CPU GROUP :87 */
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/* */
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/* This file is generated by Renesas Project Generator (Ver.4.18). */
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/* NOTE:THIS IS A TYPICAL EXAMPLE. */
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/***********************************************************************/
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#include "sfr32c87.h"
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#define PLCD p3;
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void init_portserie(void)
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{
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U0MR = 0b00000101; // 4800 bauds, 8 bits de donn?es, 1 bit de stop, pas de parit?
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U0SMR0 = 0b00000000;
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U0C0 = 0b00010000; //configuration F = 20 Mhz
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U0BRG = FF; //configuration de m = 255
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U0C1 = 0b00010001;
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PD6 = 0b10101000;
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PS0 = 10001000;
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}
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void main(void)
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{
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}
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