root/branch/gresset/sp4c12/SP4C12/SP4C12.c @ 726
| 722 | begresset | /***********************************************************************/
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/* */
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/* FILE :SP4C12.c */
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/* DATE :Wed, Jun 02, 2021 */
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/* DESCRIPTION :main program file. */
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/* CPU GROUP :87B */
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/* */
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/* This file is generated by Renesas Project Generator (Ver.4.18). */
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/* NOTE:THIS IS A TYPICAL EXAMPLE. */
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/***********************************************************************/
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#include "sfr32c87.h"
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void uart0_init(void){
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u0mr=0b00000101;
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| 726 | begresset | u0brg=0b00100000;
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| 722 | begresset | u0c0=0b00010001;
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| 726 | begresset | u0c1=0b00000101;
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pd6=0b00011000;
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ps0=0b00001000;
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| 722 | begresset | }
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| 726 | begresset | void uart0_tx(char c){
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while (ti_u0c1!=1){
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u0tb=c;
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}
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}
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| 722 | begresset | ||
void main(void)
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{
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| 726 | begresset | uart0_init();
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while (1)
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{
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uart0_tx ('c');
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}
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| 722 | begresset | }
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