Travaux Pratiques » Polytech Ge SP4abc 2021

;*******************************************************************************

;

; C Compiler for M16C/80

; Copyright (C) 1999 (2000 - 2010) Renesas Electronics Corporation.

; and Renesas Solutions Corporation. All rights reserved.

;

;

; sect30.inc : section definition

; This program is applicable when using the basic I/O library

;

; $Date: 2005/10/12 07:54:36 $

; $Revision: 1.24 $

;

;******************************************************************************

;---------------------------------------------------------------

;

; Arrangement of section

;

;---------------------------------------------------------------

; Near RAM data area

;---------------------------------------------------------------

; SBDATA area

.section data_SE,DATA

.org 400H

data_SE_top:

; for NSD

.section data_MON1_SE,DATA

data_MON1_SE_top:

.section data_MON2_SE,DATA

data_MON2_SE_top:

.section data_MON3_SE,DATA

data_MON3_SE_top:

.section data_MON4_SE,DATA

data_MON4_SE_top:

.section bss_SE,DATA,ALIGN

bss_SE_top:

; for NSD

.section bss_MON1_SE,DATA,ALIGN

bss_MON1_SE_top:

.section bss_MON2_SE,DATA,ALIGN

bss_MON2_SE_top:

.section bss_MON3_SE,DATA,ALIGN

bss_MON3_SE_top:

.section bss_MON4_SE,DATA,ALIGN

bss_MON4_SE_top:

.section data_SO,DATA

data_SO_top:

; for NSD

.section data_MON1_SO,DATA

data_MON1_SO_top:

.section data_MON2_SO,DATA

data_MON2_SO_top:

.section data_MON3_SO,DATA

data_MON3_SO_top:

.section data_MON4_SO,DATA

data_MON4_SO_top:

.section bss_SO,DATA

bss_SO_top:

; for NSD

.section bss_MON1_SO,DATA

bss_MON1_SO_top:

.section bss_MON2_SO,DATA

bss_MON2_SO_top:

.section bss_MON3_SO,DATA

bss_MON3_SO_top:

.section bss_MON4_SO,DATA

bss_MON4_SO_top:

; near RAM area

.section data_NE,DATA,ALIGN

data_NE_top:

; for NSD

.section data_MON1_E,DATA,ALIGN

data_MON1_E_top:

.section data_MON2_E,DATA,ALIGN

data_MON2_E_top:

.section data_MON3_E,DATA,ALIGN

data_MON3_E_top:

.section data_MON4_E,DATA,ALIGN

data_MON4_E_top:

.section bss_NE,DATA,ALIGN

bss_NE_top:

; for NSD

.section bss_MON1_E,DATA,ALIGN

bss_MON1_E_top:

.section bss_MON2_E,DATA,ALIGN

bss_MON2_E_top:

.section bss_MON3_E,DATA,ALIGN

bss_MON3_E_top:

.section bss_MON4_E,DATA,ALIGN

bss_MON4_E_top:

.section data_NO,DATA

data_NO_top:

; for NSD

.section data_MON1_O,DATA

data_MON1_O_top:

.section data_MON2_O,DATA

data_MON2_O_top:

.section data_MON3_O,DATA

data_MON3_O_top:

.section data_MON4_O,DATA

data_MON4_O_top:

.section bss_NO,DATA

bss_NO_top:

; for NSD

.section bss_MON1_O,DATA

bss_MON1_O_top:

.section bss_MON2_O,DATA

bss_MON2_O_top:

.section bss_MON3_O,DATA

bss_MON3_O_top:

.section bss_MON4_O,DATA

bss_MON4_O_top:

;---------------------------------------------------------------

; Stack area

;---------------------------------------------------------------

.section stack,DATA,ALIGN

.blkb STACKSIZE

.align

stack_top:

.blkb ISTACKSIZE

.align

istack_top:

;---------------------------------------------------------------

; heap section

;---------------------------------------------------------------

.if __HEAP__ != 1

.section heap,DATA

heap_top:

.blkb HEAPSIZE

.endif

;---------------------------------------------------------------

; Near ROM data area

;---------------------------------------------------------------

.section rom_NE,ROMDATA,ALIGN

rom_NE_top:

.section rom_NO,ROMDATA

rom_NO_top:

;---------------------------------------------------------------

; Far RAM data area

;---------------------------------------------------------------

; SBDATA area for #pragma SB16DATA

; .section data_SE,DATA

; .org 10000H

;data_SE_top:

; for NSD

; .section data_MON1_SE,DATA

;data_MON1_SE_top:

; .section data_MON2_SE,DATA

;data_MON2_SE_top:

; .section data_MON3_SE,DATA

;data_MON3_SE_top:

; .section data_MON4_SE,DATA

;data_MON4_SE_top:

;

; .section bss_SE,DATA,ALIGN

;bss_SE_top:

; for NSD

; .section bss_MON1_SE,DATA,ALIGN

;bss_MON1_SE_top:

; .section bss_MON2_SE,DATA,ALIGN

;bss_MON2_SE_top:

; .section bss_MON3_SE,DATA,ALIGN

;bss_MON3_SE_top:

; .section bss_MON4_SE,DATA,ALIGN

;bss_MON4_SE_top:

;

; .section data_SO,DATA

;data_SO_top:

; for NSD

; .section data_MON1_SO,DATA

;data_MON1_SO_top:

; .section data_MON2_SO,DATA

;data_MON2_SO_top:

; .section data_MON3_SO,DATA

;data_MON3_SO_top:

; .section data_MON4_SO,DATA

;data_MON4_SO_top:

;

; .section bss_SO,DATA

;bss_SO_top:

; for NSD

; .section bss_MON1_SO,DATA

;bss_MON1_SO_top:

; .section bss_MON2_SO,DATA

;bss_MON2_SO_top:

; .section bss_MON3_SO,DATA

;bss_MON3_SO_top:

; .section bss_MON4_SO,DATA

;bss_MON4_SO_top:

;

; .section data_6E,DATA,ALIGN

;data_6E_top:

; for NSD

; .section data_MON1_6E,DATA,ALIGN

;data_MON1_6E_top:

; .section data_MON2_6E,DATA,ALIGN

;data_MON2_6E_top:

; .section data_MON3_6E,DATA,ALIGN

;data_MON3_6E_top:

; .section data_MON4_6E,DATA,ALIGN

;data_MON4_6E_top:

;

; .section bss_6E,DATA,ALIGN

;bss_6E_top:

; for NSD

; .section bss_MON1_6E,DATA,ALIGN

;bss_MON1_6E_top:

; .section bss_MON2_6E,DATA,ALIGN

;bss_MON2_6E_top:

; .section bss_MON3_6E,DATA,ALIGN

;bss_MON3_6E_top:

; .section bss_MON4_6E,DATA,ALIGN

;bss_MON4_6E_top:

;

; .section data_6O,DATA

;data_6O_top:

; for NSD

; .section data_MON1_6O,DATA

;data_MON1_6O_top:

; .section data_MON2_6O,DATA

;data_MON2_6O_top:

; .section data_MON3_6O,DATA

;data_MON3_6O_top:

; .section data_MON4_6O,DATA

;data_MON4_6O_top:

;

; .section bss_6O,DATA

;bss_6O_top:

; for NSD

; .section bss_MON1_6O,DATA

;bss_MON1_6O_top:

; .section bss_MON2_6O,DATA

;bss_MON2_6O_top:

; .section bss_MON3_6O,DATA

;bss_MON3_6O_top:

; .section bss_MON4_6O,DATA

;bss_MON4_6O_top:

;

.section data_FE,DATA

.org 20000H

data_FE_top:

; for NSD

; .section data_MON1_E,DATA

;data_MON1_E_top:

; .section data_MON2_E,DATA

;data_MON2_E_top:

; .section data_MON3_E,DATA

;data_MON3_E_top:

; .section data_MON4_E,DATA

;data_MON4_E_top:

.section bss_FE,DATA,ALIGN

bss_FE_top:

; for NSD

; .section bss_MON1_E,DATA,ALIGN

;bss_MON1_E_top:

; .section bss_MON2_E,DATA,ALIGN

;bss_MON2_E_top:

; .section bss_MON3_E,DATA,ALIGN

;bss_MON3_E_top:

; .section bss_MON4_E,DATA,ALIGN

;bss_MON4_E_top:

.section data_FO,DATA

data_FO_top:

; for NSD

; .section data_MON1_O,DATA

;data_MON1_O_top:

; .section data_MON2_O,DATA

;data_MON2_O_top:

; .section data_MON3_O,DATA

;data_MON3_O_top:

; .section data_MON4_O,DATA

;data_MON4_O_top:

.section bss_FO,DATA

bss_FO_top:

; for NSD

; .section bss_MON1_O,DATA

;bss_MON1_O_top:

; .section bss_MON2_O,DATA

;bss_MON2_O_top:

; .section bss_MON3_O,DATA

;bss_MON3_O_top:

; .section bss_MON4_O,DATA

;bss_MON4_O_top:

;---------------------------------------------------------------

; Far ROM data area

;---------------------------------------------------------------

.section rom_FE,ROMDATA

.org 0FE0000H

rom_FE_top:

.section rom_FO,ROMDATA

rom_FO_top:

;---------------------------------------------------------------

; Initial data of 'data' section

;---------------------------------------------------------------

.section data_SEI,ROMDATA

data_SEI_top:

; for NSD

.section data_MON1_SEI,ROMDATA

data_MON1_SEI_top:

.section data_MON2_SEI,ROMDATA

data_MON2_SEI_top:

.section data_MON3_SEI,ROMDATA

data_MON3_SEI_top:

.section data_MON4_SEI,ROMDATA

data_MON4_SEI_top:

.section data_SOI,ROMDATA

data_SOI_top:

; for NSD

.section data_MON1_SOI,ROMDATA

data_MON1_SOI_top:

.section data_MON2_SOI,ROMDATA

data_MON2_SOI_top:

.section data_MON3_SOI,ROMDATA

data_MON3_SOI_top:

.section data_MON4_SOI,ROMDATA

data_MON4_SOI_top:

; .section data_6EI,ROMDATA

;data_6EI_top:

; for NSD

; .section data_MON1_6EI,ROMDATA

;data_MON1_6EI_top:

; .section data_MON2_6EI,ROMDATA

;data_MON2_6EI_top:

; .section data_MON3_6EI,ROMDATA

;data_MON3_6EI_top:

; .section data_MON4_6EI,ROMDATA

;data_MON4_6EI_top:

;

; .section data_6OI,ROMDATA

;data_6OI_top:

; for NSD

; .section data_MON1_6OI,ROMDATA

;data_MON1_6OI_top:

; .section data_MON2_6OI,ROMDATA

;data_MON2_6OI_top:

; .section data_MON3_6OI,ROMDATA

;data_MON3_6OI_top:

; .section data_MON4_6OI,ROMDATA

;data_MON4_6OI_top:

.section data_NEI,ROMDATA

data_NEI_top:

; for NSD

.section data_MON1_EI,ROMDATA

data_MON1_EI_top:

.section data_MON2_EI,ROMDATA

data_MON2_EI_top:

.section data_MON3_EI,ROMDATA

data_MON3_EI_top:

.section data_MON4_EI,ROMDATA

data_MON4_EI_top:

.section data_NOI,ROMDATA

data_NOI_top:

; for NSD

.section data_MON1_OI,ROMDATA

data_MON1_OI_top:

.section data_MON2_OI,ROMDATA

data_MON2_OI_top:

.section data_MON3_OI,ROMDATA

data_MON3_OI_top:

.section data_MON4_OI,ROMDATA

data_MON4_OI_top:

.section data_FEI,ROMDATA

data_FEI_top:

; for NSD

; .section data_MON1_EI,ROMDATA

;data_MON1_EI_top:

; .section data_MON2_EI,ROMDATA

;data_MON2_EI_top:

; .section data_MON3_EI,ROMDATA

;data_MON3_EI_top:

; .section data_MON4_EI,ROMDATA

;data_MON4_EI_top:

.section data_FOI,ROMDATA

data_FOI_top:

; for NSD

; .section data_MON1_OI,ROMDATA

;data_MON1_OI_top:

; .section data_MON2_OI,ROMDATA

;data_MON2_OI_top:

; .section data_MON3_OI,ROMDATA

;data_MON3_OI_top:

; .section data_MON4_OI,ROMDATA

;data_MON4_OI_top:

;---------------------------------------------------------------

; code area

;---------------------------------------------------------------

.section interrupt,ALIGN

.section program,ALIGN

.section program_S

.org 0FF0000H

;---------------------------------------------------------------

; variable vector section

;---------------------------------------------------------------

.section vector,ROMDATA ; variable vector table

.org VECTOR_ADR

.if __MVT__ == 0

.lword dummy_int ; BRK (software int 0)

.lword dummy_int ;

.lword dummy_int ;

.lword dummy_int ;

.lword dummy_int ;

.lword dummy_int ;

.lword dummy_int ;

.lword dummy_int ;

.lword dummy_int ; DMA0 (software int 8)

.lword dummy_int ; DMA1 (software int 9)

.lword dummy_int ; DMA2 (software int 10)

.lword dummy_int ; DMA3 (software int 11)

.lword dummy_int ; TIMER A0 (software int 12)

.lword dummy_int ; TIMER A1 (software int 13)

.lword dummy_int ; TIMER A2 (software int 14)

.lword dummy_int ; TIMER A3 (software int 15)

.lword dummy_int ; TIMER A4 (software int 16)

.lword dummy_int ; uart0 trance (software int 17)

.lword dummy_int ; uart0 receive (software int 18)

.lword dummy_int ; uart1 trance (software int 19)

.lword dummy_int ; uart1 receive (software int 20)

.lword dummy_int ; TIMER B0 (software int 21)

.lword dummy_int ; TIMER B1 (software int 22)

.lword dummy_int ; TIMER B2 (software int 23)

.lword dummy_int ; TIMER B3 (software int 24)

.lword dummy_int ; TIMER B4 (software int 25)

.lword dummy_int ; INT5 (software int 26)

.lword dummy_int ; INT4 (software int 27)

.lword dummy_int ; INT3 (software int 28)

.lword dummy_int ; INT2 (software int 29)

.lword dummy_int ; INT1 (software int 30)

.lword dummy_int ; INT0 (software int 31)

.lword dummy_int ; TIMER B5 (software int 32)

.lword dummy_int ; uart2 trance/NACK (software int 33)

.lword dummy_int ; uart2 receive/ACK (software int 34)

.lword dummy_int ; uart3 trance/NACK (software int 35)

.lword dummy_int ; uart3 receive/ACK (software int 36)

.lword dummy_int ; uart4 trance/NACK (software int 37)

.lword dummy_int ; uart4 receive/ACK (software int 38)

.lword dummy_int ; uart2 bus collision (software int 39)

.lword dummy_int ; uart3 bus collision (software int 40)

.lword dummy_int ; uart4 bus collision (software int 41)

.lword dummy_int ; A-D Convert (software int 42)

.lword dummy_int ; input key (software int 43)

.lword dummy_int ; software int 44

.lword dummy_int ; software int 45

.lword dummy_int ; software int 46

.lword dummy_int ; software int 47

.lword dummy_int ; software int 48

.lword dummy_int ; software int 49

.lword dummy_int ; software int 50

.lword dummy_int ; software int 51

.lword dummy_int ; software int 52

.lword dummy_int ; software int 53

.lword dummy_int ; software int 54

.lword dummy_int ; software int 55

.lword dummy_int ; software int 56

.lword dummy_int ; software int 57

.lword dummy_int ; software int 58

.lword dummy_int ; software int 59

.lword dummy_int ; software int 60

.lword dummy_int ; software int 61

.lword dummy_int ; software int 62

.lword dummy_int ; software int 63

.endif ; __MVT__

;===============================================================

; fixed vector section

;---------------------------------------------------------------

.section svector,ROMDATA ; specialpage vector table

.if __MST__ == 0

.org SVECTOR_ADR

;===============================================================

; special page defination

;---------------------------------------------------------------

; macro is defined in ncrt0.a30

; Format: SPECIAL number

;

;---------------------------------------------------------------

; SPECIAL 255

; SPECIAL 254

; SPECIAL 253

; SPECIAL 252

; SPECIAL 251

; SPECIAL 250

; SPECIAL 249

; SPECIAL 248

; SPECIAL 247

; SPECIAL 246

; SPECIAL 245

; SPECIAL 244

; SPECIAL 243

; SPECIAL 242

; SPECIAL 241

; SPECIAL 240

; SPECIAL 239

; SPECIAL 238

; SPECIAL 237

; SPECIAL 236

; SPECIAL 235

; SPECIAL 234

; SPECIAL 233

; SPECIAL 232

; SPECIAL 231

; SPECIAL 230

; SPECIAL 229

; SPECIAL 228

; SPECIAL 227

; SPECIAL 226

; SPECIAL 225

; SPECIAL 224

; SPECIAL 223

; SPECIAL 222

; SPECIAL 221

; SPECIAL 220

; SPECIAL 219

; SPECIAL 218

; SPECIAL 217

; SPECIAL 216

; SPECIAL 215

; SPECIAL 214

; SPECIAL 213

; SPECIAL 212

; SPECIAL 211

; SPECIAL 210

; SPECIAL 209

; SPECIAL 208

; SPECIAL 207

; SPECIAL 206

; SPECIAL 205

; SPECIAL 204

; SPECIAL 203

; SPECIAL 202

; SPECIAL 201

; SPECIAL 200

; SPECIAL 199

; SPECIAL 198

; SPECIAL 197

; SPECIAL 196

; SPECIAL 195

; SPECIAL 194

; SPECIAL 193

; SPECIAL 192

; SPECIAL 191

; SPECIAL 190

; SPECIAL 189

; SPECIAL 188

; SPECIAL 187

; SPECIAL 186

; SPECIAL 185

; SPECIAL 184

; SPECIAL 183

; SPECIAL 182

; SPECIAL 181

; SPECIAL 180

; SPECIAL 179

; SPECIAL 178

; SPECIAL 177

; SPECIAL 176

; SPECIAL 175

; SPECIAL 174

; SPECIAL 173

; SPECIAL 172

; SPECIAL 171

; SPECIAL 170

; SPECIAL 169

; SPECIAL 168

; SPECIAL 167

; SPECIAL 166

; SPECIAL 165

; SPECIAL 164

; SPECIAL 163

; SPECIAL 162

; SPECIAL 161

; SPECIAL 160

; SPECIAL 159

; SPECIAL 158

; SPECIAL 157

; SPECIAL 156

; SPECIAL 155

; SPECIAL 154

; SPECIAL 153

; SPECIAL 152

; SPECIAL 151

; SPECIAL 150

; SPECIAL 149

; SPECIAL 148

; SPECIAL 147

; SPECIAL 146

; SPECIAL 145

; SPECIAL 144

; SPECIAL 143

; SPECIAL 142

; SPECIAL 141

; SPECIAL 140

; SPECIAL 139

; SPECIAL 138

; SPECIAL 137

; SPECIAL 136

; SPECIAL 135

; SPECIAL 134

; SPECIAL 133

; SPECIAL 132

; SPECIAL 131

; SPECIAL 130

; SPECIAL 129

; SPECIAL 128

; SPECIAL 127

; SPECIAL 126

; SPECIAL 125

; SPECIAL 124

; SPECIAL 123

; SPECIAL 122

; SPECIAL 121

; SPECIAL 120

; SPECIAL 119

; SPECIAL 118

; SPECIAL 117

; SPECIAL 116

; SPECIAL 115

; SPECIAL 114

; SPECIAL 113

; SPECIAL 112

; SPECIAL 111

; SPECIAL 110

; SPECIAL 109

; SPECIAL 108

; SPECIAL 107

; SPECIAL 106

; SPECIAL 105

; SPECIAL 104

; SPECIAL 103

; SPECIAL 102

; SPECIAL 101

; SPECIAL 100

; SPECIAL 99

; SPECIAL 98

; SPECIAL 97

; SPECIAL 96

; SPECIAL 95

; SPECIAL 94

; SPECIAL 93

; SPECIAL 92

; SPECIAL 91

; SPECIAL 90

; SPECIAL 89

; SPECIAL 88

; SPECIAL 87

; SPECIAL 86

; SPECIAL 85

; SPECIAL 84

; SPECIAL 83

; SPECIAL 82

; SPECIAL 81

; SPECIAL 80

; SPECIAL 79

; SPECIAL 78

; SPECIAL 77

; SPECIAL 76

; SPECIAL 75

; SPECIAL 74

; SPECIAL 73

; SPECIAL 72

; SPECIAL 71

; SPECIAL 70

; SPECIAL 69

; SPECIAL 68

; SPECIAL 67

; SPECIAL 66

; SPECIAL 65

; SPECIAL 64

; SPECIAL 63

; SPECIAL 62

; SPECIAL 61

; SPECIAL 60

; SPECIAL 59

; SPECIAL 58

; SPECIAL 57

; SPECIAL 56

; SPECIAL 55

; SPECIAL 54

; SPECIAL 53

; SPECIAL 52

; SPECIAL 51

; SPECIAL 50

; SPECIAL 49

; SPECIAL 48

; SPECIAL 47

; SPECIAL 46

; SPECIAL 45

; SPECIAL 44

; SPECIAL 43

; SPECIAL 42

; SPECIAL 41

; SPECIAL 40

; SPECIAL 39

; SPECIAL 38

; SPECIAL 37

; SPECIAL 36

; SPECIAL 35

; SPECIAL 34

; SPECIAL 33

; SPECIAL 32

; SPECIAL 31

; SPECIAL 30

; SPECIAL 29

; SPECIAL 28

; SPECIAL 27

; SPECIAL 26

; SPECIAL 25

; SPECIAL 24

; SPECIAL 23

; SPECIAL 22

; SPECIAL 21

; SPECIAL 20

; SPECIAL 19

; SPECIAL 18

;

.endif ; __MST__

;===============================================================

; fixed vector section

;---------------------------------------------------------------

.section fvector,ROMDATA

.org 0FFFFDCh

UDI:

.lword dummy_int

OVER_FLOW:

.lword dummy_int

BRKI:

.lword dummy_int

ADDRESS_MATCH:

.lword dummy_int

SINGLE_STEP:

.lword dummy_int

WDT:

.lword dummy_int

DBC:

.lword dummy_int

NMI:

.lword dummy_int

RESET:

.lword start

;

;*******************************************************************************

;

; C Compiler for M16C/80

; Copyright (C) 1999 (2000 - 2010) Renesas Electronics Corporation.

; and Renesas Solutions Corporation. All rights reserved.

;

;

;*******************************************************************************

[HIMDBVersion]

2.0

[DATABASE_VERSION]

"2.3"

[SESSION_DETAILS]

""

[INFORMATION]

""

[GENERAL_DATA]

"RESET_CPU_AFTER_DOWNLOAD_TAG" "VARIANT_TRUE_STORE_TAG"

[LANGUAGE]

"English"

[CONFIG_INFO_VD1]

0

[CONFIG_INFO_VD2]

0

[CONFIG_INFO_VD3]

0

[CONFIG_INFO_VD4]

0

[WINDOW_POSITION_STATE_DATA_VD1]

[WINDOW_POSITION_STATE_DATA_VD2]

[WINDOW_POSITION_STATE_DATA_VD3]

[WINDOW_POSITION_STATE_DATA_VD4]

[WINDOW_Z_ORDER]

[TARGET_NAME]

"M32C Simulator" "" 0

[STATUSBAR_STATEINFO_VD1]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_STATEINFO_VD2]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_STATEINFO_VD3]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_STATEINFO_VD4]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_DEBUGGER_PANESTATE_VD1]

[STATUSBAR_DEBUGGER_PANESTATE_VD2]

[STATUSBAR_DEBUGGER_PANESTATE_VD3]

[STATUSBAR_DEBUGGER_PANESTATE_VD4]

[DEBUGGER_OPTIONS]

"Unknown Options"

[DOWNLOAD_MODULES]

"$(CONFIGDIR)\$(PROJECTNAME).x30" 0 "IEEE695_RENESAS" 0 0 1 0

[CONNECT_ON_GO]

"FALSE"

[DOWNLOAD_MODULES_AFTER_BUILD]

"TRUE"

[REMOVE_BREAKPOINTS_ON_DOWNLOAD]

"TRUE"

[DISABLE_MEMORY_ACCESS_PRIOR_TO_COMMAND_FILE_EXECUTION]

"FALSE"

[LIMIT_DISASSEMBLY_MEMORY_ACCESS]

"FALSE"

[DISABLE_MEMORY_ACCESS_DURING_EXECUTION]

"FALSE"

[DEBUGGER_OPTIONS_PROPERTIES]

"1"

[COMMAND_FILES]

[DEFAULT_DEBUG_FORMAT]

""

[FLASH_DETAILS]

"" 0 0 "" 0 "" 0 0 "" 0 0 0 0 0 0 0 "" "" "" "" ""

[BREAKPOINTS]

[END]

[HIMDBVersion]

2.0

[DATABASE_VERSION]

"2.3"

[SESSION_DETAILS]

""

[INFORMATION]

""

[GENERAL_DATA]

"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlECX_MAP_FIND_SYMBOL_LIST" ""

"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlViews" "0"

"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBatchFileName" ""

"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBreakpointFlag" "-1 "

"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBreakpointStatus" "-1 "

"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBrowseDirectory" ""

"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlLogFileName" ""

"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlSplitterPosition" "242"

"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlViews" "0"

"{313F4FC1-6566-11D5-8BBE-0004E2013C71}TclTkCtrlLogFileName" ""

"{6C4D5B81-FD67-46A9-A089-EA44DCDE47FD}RAMMonitorManagerCtrlBlockInfoFileDir" ""

"{6C4D5B81-FD67-46A9-A089-EA44DCDE47FD}RAMMonitorManagerCtrlBlockInfoFileName" ""

"{7943C44E-7D44-422A-9140-4CF55C88F7D3}DifferenceCtrlViews" "0"

[LANGUAGE]

"English"

[CONFIG_INFO_VD1]

1

[CONFIG_INFO_VD2]

0

[CONFIG_INFO_VD3]

0

[CONFIG_INFO_VD4]

0

[WINDOW_POSITION_STATE_DATA_VD1]

"Help" "TOOLBAR 0" 59419 1 5 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_00000001_OUTPUT}" "WINDOW" 59422 0 0 "1.00" 180 683 371 350 200 18 0 "36756|36757|36758|36759|<<separator>>|36746|36747|<<separator>>|39531|<<separator>>|39500|39534|<<separator>>|36687" "0.0"

"{WK_00000002_WORKSPACE}" "WINDOW" 59420 0 0 "1.00" 180 683 371 350 200 18 0 "" "0.0"

"{WK_TB00000001_STANDARD}" "TOOLBAR 0" 59419 0 2 "0.00" 0 0 0 0 0 18 0 "" "0.0"

"{WK_TB00000002_EDITOR}" "TOOLBAR 0" 59419 0 0 "0.00" 0 0 0 0 0 18 0 "" "0.0"

"{WK_TB00000003_BOOKMARKS}" "TOOLBAR 0" 59419 1 1 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000004_TEMPLATES}" "TOOLBAR 0" 59419 1 0 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000005_SEARCH}" "TOOLBAR 0" 59419 0 1 "0.00" 0 0 0 0 0 18 0 "" "0.0"

"{WK_TB00000007_DEBUG}" "TOOLBAR 0" 59419 2 0 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000008_DEBUGRUN}" "TOOLBAR 0" 59419 2 1 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000009_VERSIONCONTROL}" "TOOLBAR 0" 59419 1 3 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000012_MAP}" "TOOLBAR 0" 59419 1 4 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000018_DEFAULTWINDOW}" "TOOLBAR 0" 59419 1 2 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000026_MACRO}" "TOOLBAR 0" 59419 1 6 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000028_RTOSDEBUG}" "TOOLBAR 0" 59419 2 2 "0.00" 0 0 0 0 0 17 0 "" "0.0"

"{WK_TB00000029_SYSTEMTOOL}" "TOOLBAR 0" 59419 2 3 "0.00" 0 0 0 0 0 17 0 "" "0.0"

[WINDOW_POSITION_STATE_DATA_VD2]

[WINDOW_POSITION_STATE_DATA_VD3]

[WINDOW_POSITION_STATE_DATA_VD4]

[WINDOW_Z_ORDER]

"M:\SP4TP\sp4c12\SP4c1\SP4c1\SP4c1.c"

[TARGET_NAME]

"" "" 1701667150

[STATUSBAR_STATEINFO_VD1]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_STATEINFO_VD2]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_STATEINFO_VD3]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_STATEINFO_VD4]

"MasterShowState" 1

"ApplicationShowState" 1

"DebuggerShowState" 1

[STATUSBAR_DEBUGGER_PANESTATE_VD1]

[STATUSBAR_DEBUGGER_PANESTATE_VD2]

[STATUSBAR_DEBUGGER_PANESTATE_VD3]

[STATUSBAR_DEBUGGER_PANESTATE_VD4]

[DEBUGGER_OPTIONS]

""

[DOWNLOAD_MODULES]

[CONNECT_ON_GO]

"FALSE"

[DOWNLOAD_MODULES_AFTER_BUILD]

"TRUE"

[REMOVE_BREAKPOINTS_ON_DOWNLOAD]

"FALSE"

[DISABLE_MEMORY_ACCESS_PRIOR_TO_COMMAND_FILE_EXECUTION]

"FALSE"

[LIMIT_DISASSEMBLY_MEMORY_ACCESS]

"FALSE"

[DISABLE_MEMORY_ACCESS_DURING_EXECUTION]

"FALSE"

[DEBUGGER_OPTIONS_PROPERTIES]

"1"

[COMMAND_FILES]

[DEFAULT_DEBUG_FORMAT]

""

[FLASH_DETAILS]

"" 0 0 "" 0 "" 0 0 "" 0 0 0 0 0 0 0 "" "" "" "" ""

[BREAKPOINTS]

[END]

[HIMDBVersion]

2.0

[DATABASE_VERSION]

"2.8"

[PROJECT_DETAILS]

"SP4c1" "M:\SP4TP\sp4c12\SP4c1\SP4c1" "M:\SP4TP\sp4c12\SP4c1\SP4c1\SP4c1.hwp" "M16C/80,M32C" "Renesas M32C Standard" "Application" "M32C/80" "M32C/87(M32C/87B)"

[INFORMATION]

"No project information available"

[TOOL_CHAIN]

"Renesas M32C Standard Toolchain" "5.42.00"

[CONFIGURATIONS]

"Debug" "M:\SP4TP\sp4c12\SP4c1\SP4c1\Debug"

"Debug_M32C_E8a_SYSTEM" "M:\SP4TP\sp4c12\SP4c1\SP4c1\Debug_M32C_E8a_SYSTEM"

"Debug_M32C_Simulator" "M:\SP4TP\sp4c12\SP4c1\SP4c1\Debug_M32C_Simulator"

"Release" "M:\SP4TP\sp4c12\SP4c1\SP4c1\Release"

[BUILD_PHASES]

"Renesas M32C Assembler" 1

"Renesas M32C C Compiler" 1

"Renesas M32C Configurator" 1

"Renesas M32C Librarian" 1

"Renesas M32C Linker" 1

"Renesas M32C Stype Converter" 1

[TOOL_ENVIRONMENT]

[EXTENSIONS]

"Absolute file" "X30"

"Absolute list file" "ALS"

"Assembler error tag file" "ATG"

"Assembly include file" "INC"

"Assembly list file" "LST"

"Assembly source file" "A30"

"Branch Information file" "JIN"

"C header file" "H"

"C source file" "C"

"Configuration file" "CFG"

"Cross reference file" "XRF"

"Hex file" "HEX"

"ID file" "ID"

"Library file" "LIB"

"Library list file" "LLS"

"Linkage error tag file" "LTG"

"Linkage map file" "MAP"

"Preprocessed C source file" "I"

"Relocatable file" "R30"

"S-Record file" "MOT"

"Systemcall file" "MRC"

[FILE_GROUPS]

"Absolute file" "BIN" "NONE" ""

"Absolute list file" "TEXT" "EDITOR" ""

"Assembler error tag file" "TEXT" "EDITOR" ""

"Assembly include file" "TEXT" "EDITOR" ""

"Assembly list file" "TEXT" "EDITOR" ""

"Assembly source file" "TEXT" "EDITOR" ""

"Branch Information file" "TEXT" "EDITOR" ""

"C header file" "TEXT" "EDITOR" ""

"C source file" "TEXT" "EDITOR" ""

"Configuration file" "TEXT" "EDITOR" ""

"Cross reference file" "TEXT" "EDITOR" ""

"Hex file" "TEXT" "EDITOR" ""

"ID file" "TEXT" "EDITOR" ""

"Library file" "BIN" "NONE" ""

"Library list file" "TEXT" "EDITOR" ""

"Linkage error tag file" "TEXT" "EDITOR" ""

"Linkage map file" "TEXT" "EDITOR" ""

"Preprocessed C source file" "TEXT" "EDITOR" ""

"Relocatable file" "BIN" "NONE" ""

"S-Record file" "TEXT" "EDITOR" ""

"Systemcall file" "TEXT" "EDITOR" ""

[ASSOCIATED_APPLICATIONS]

[TOOLCHAIN_PHASE]

"Renesas M32C Assembler"

"Renesas M32C C Compiler"

"Renesas M32C Configurator"

"Renesas M32C Librarian"

"Renesas M32C Linker"

"Renesas M32C Stype Converter"

[UTILITY_PHASE]

[CUSTOM_PHASES]

[CUSTOM_PHASE_INPUT_GROUP]

[CUSTOM_PHASE_OUTPUT_SYNTAX]

[BUILD_ORDER]

"Renesas M32C C Compiler" 1

"Renesas M32C Assembler" 1

"Renesas M32C Linker" 1

"Renesas M32C Stype Converter" 1

"Renesas M32C Librarian" 0

"Renesas M32C Configurator" 0

[BUILD_PHASE_DETAILS]

"Renesas M32C Assembler" "Assembly source file" 1

"Renesas M32C C Compiler" "C source file" 1

"Renesas M32C Configurator" "Configuration file" 0

"Renesas M32C Librarian" "Relocatable file" 0

"Renesas M32C Linker" "Relocatable file" 0

"Renesas M32C Stype Converter" "Absolute file" 0

[BUILD_FILE_ORDER_Assembly source file]

"Renesas M32C Assembler" 1

[BUILD_FILE_ORDER_C source file]

"Renesas M32C C Compiler" 1

[SCRAP]

"Project Generator Setup File" ""

[MAPPINGS]

"Absolute file" "Renesas M32C Stype Converter" "Renesas M32C Linker"

"Assembly source file" "Renesas M32C Assembler" "Renesas M32C C Compiler"

"Relocatable file" "Renesas M32C Librarian" "Renesas M32C Assembler"

"Relocatable file" "Renesas M32C Librarian" "Renesas M32C C Compiler"

"Relocatable file" "Renesas M32C Linker" "Renesas M32C Assembler"

"Relocatable file" "Renesas M32C Linker" "Renesas M32C C Compiler"

[PROJECT_FILES]

"M:\SP4TP\sp4c12\SP4c1\SP4c1\SP4c1.c" "User" "C source file" 2

"M:\SP4TP\sp4c12\SP4c1\SP4c1\ncrt0.a30" "User" "Assembly source file" 2

[FOLDER]

"Assembly source file" "Assembly source file"

"C source file" "C source file"

[GENERAL_DATA_PROJECT]

"USE_CUSTOM_LINKAGE_ORDER" "1"

[ON_DEMAND_COMPONENTS_LOADED]

[SYNC_SESSION_NAMES]

[SESSIONS]

"DefaultSession" "M:\SP4TP\sp4c12\SP4c1\SP4c1\DefaultSession.hsf" 0

"SessionM32C_E8a_SYSTEM" "M:\SP4TP\sp4c12\SP4c1\SP4c1\SessionM32C_E8a_SYSTEM.hsf" 0

"SessionM32C_Simulator" "M:\SP4TP\sp4c12\SP4c1\SP4c1\SessionM32C_Simulator.hsf" 0

[GENERAL_DATA_SESSION_DefaultSession]

[GENERAL_DATA_SESSION_SessionM32C_E8a_SYSTEM]

[GENERAL_DATA_SESSION_SessionM32C_Simulator]

[OPTIONS_Debug_Renesas M32C Assembler]

"Assembly source file" "0128987b88757d10" 2

"M:\SP4TP\sp4c12\SP4c1\SP4c1\ncrt0.a30" "0128987b88757d10" 2

[OPTIONS_Debug_Renesas M32C C Compiler]

"C source file" "0128987b88757d10" 1

"M:\SP4TP\sp4c12\SP4c1\SP4c1\SP4c1.c" "0128987b88757d10" 1

[OPTIONS_Debug_Renesas M32C Configurator]

"Single Shot" "0128987b88757d10" 6

[OPTIONS_Debug_Renesas M32C Librarian]

"Single Shot" "0128987b88757d10" 5

[OPTIONS_Debug_Renesas M32C Linker]

"Single Shot" "0128987b88757d10" 3

[OPTIONS_Debug_Renesas M32C Stype Converter]

"Single Shot" "0128987b88757d10" 4

[OPTIONS_Debug]

"" 0

"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON3] " 6

"[V|VERSION|1] [B|DATALENGTH|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] " 4

"[V|VERSION|1] [B|STARTUPLINK|1] [B|DEBUG|1] [B|MAP-S|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).x30^"] [S|INPUTLIBRARY|^"L=nc382lib^"] [S|CPU|M32C80] " 3

"[V|VERSION|1] [S|LIST|LM] [B|INSPECTOR|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [S|CPU|M32C80] [B|HEAP|1] [S|DEFINE|__USTACKSIZE__=0300H] [S|DEFINE|__ISTACKSIZE__=0300H]" 2

"[V|VERSION|1] [S|MODE|CREATE|] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] " 5

"[V|VERSION|1] [S|OUTPUT|OBJECTCODE] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [B|INSPECTOR|1] [S|CPU|M32C80] " 1

[EXCLUDED_FILES_Debug]

[LINKAGE_ORDER_Debug]

"M:\SP4TP\sp4c12\SP4c1\SP4c1\Debug\ncrt0.r30"

[GENERAL_DATA_CONFIGURATION_Debug]

[OPTIONS_Debug_M32C_E8a_SYSTEM_Renesas M32C Assembler]

"Assembly source file" "0128987b88757d10" 2

"M:\SP4TP\sp4c12\SP4c1\SP4c1\ncrt0.a30" "0128987b88757d10" 2

[OPTIONS_Debug_M32C_E8a_SYSTEM_Renesas M32C C Compiler]

"C source file" "0128987b88757d10" 1

"M:\SP4TP\sp4c12\SP4c1\SP4c1\SP4c1.c" "0128987b88757d10" 1

[OPTIONS_Debug_M32C_E8a_SYSTEM_Renesas M32C Configurator]

"Single Shot" "0128987b88757d10" 6

[OPTIONS_Debug_M32C_E8a_SYSTEM_Renesas M32C Librarian]

"Single Shot" "0128987b88757d10" 5

[OPTIONS_Debug_M32C_E8a_SYSTEM_Renesas M32C Linker]

"Single Shot" "0128987b88757d10" 3

[OPTIONS_Debug_M32C_E8a_SYSTEM_Renesas M32C Stype Converter]

"Single Shot" "0128987b88757d10" 4

[OPTIONS_Debug_M32C_E8a_SYSTEM]

"" 0

"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON3] " 6

"[V|VERSION|1] [B|DATALENGTH|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] " 4

"[V|VERSION|1] [B|STARTUPLINK|1] [B|DEBUG|1] [B|MAP-S|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).x30^"] [S|INPUTLIBRARY|^"L=nc382lib^"] [S|CPU|M32C80] " 3

"[V|VERSION|1] [S|LIST|L|M] [B|INSPECTOR|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [S|CPU|M32C80] [B|HEAP|1] [S|DEFINE|__USTACKSIZE__=0300H] [S|DEFINE|__ISTACKSIZE__=0300H]" 2

"[V|VERSION|1] [S|MODE|CREATE|] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] " 5

"[V|VERSION|1] [S|OUTPUT|OBJECTCODE] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [B|INSPECTOR|1] [S|CPU|M32C80] " 1

[EXCLUDED_FILES_Debug_M32C_E8a_SYSTEM]

[LINKAGE_ORDER_Debug_M32C_E8a_SYSTEM]

"M:\SP4TP\sp4c12\SP4c1\SP4c1\Debug_M32C_E8a_SYSTEM\ncrt0.r30"

[GENERAL_DATA_CONFIGURATION_Debug_M32C_E8a_SYSTEM]

[OPTIONS_Debug_M32C_Simulator_Renesas M32C Assembler]

"Assembly source file" "0128987b88757d10" 2

"M:\SP4TP\sp4c12\SP4c1\SP4c1\ncrt0.a30" "0128987b88757d10" 2

[OPTIONS_Debug_M32C_Simulator_Renesas M32C C Compiler]

"C source file" "0128987b88757d10" 1

"M:\SP4TP\sp4c12\SP4c1\SP4c1\SP4c1.c" "0128987b88757d10" 1

[OPTIONS_Debug_M32C_Simulator_Renesas M32C Configurator]

"Single Shot" "0128987b88757d10" 6

[OPTIONS_Debug_M32C_Simulator_Renesas M32C Librarian]

"Single Shot" "0128987b88757d10" 5

[OPTIONS_Debug_M32C_Simulator_Renesas M32C Linker]

"Single Shot" "0128987b88757d10" 3

[OPTIONS_Debug_M32C_Simulator_Renesas M32C Stype Converter]

"Single Shot" "0128987b88757d10" 4

[OPTIONS_Debug_M32C_Simulator]

"" 0

"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON3] " 6

"[V|VERSION|1] [B|DATALENGTH|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] " 4

"[V|VERSION|1] [B|STARTUPLINK|1] [B|DEBUG|1] [B|MAP-S|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).x30^"] [S|INPUTLIBRARY|^"L=nc382lib^"] [S|CPU|M32C80] " 3

"[V|VERSION|1] [S|LIST|L|M] [B|INSPECTOR|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [S|CPU|M32C80] [B|HEAP|1] [S|DEFINE|__USTACKSIZE__=0300H] [S|DEFINE|__ISTACKSIZE__=0300H]" 2

"[V|VERSION|1] [S|MODE|CREATE|] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] " 5

"[V|VERSION|1] [S|OUTPUT|OBJECTCODE] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [B|INSPECTOR|1] [S|CPU|M32C80] " 1

[EXCLUDED_FILES_Debug_M32C_Simulator]

[LINKAGE_ORDER_Debug_M32C_Simulator]

"M:\SP4TP\sp4c12\SP4c1\SP4c1\Debug_M32C_Simulator\ncrt0.r30"

[GENERAL_DATA_CONFIGURATION_Debug_M32C_Simulator]

[OPTIONS_Release_Renesas M32C Assembler]

"Assembly source file" "0128987b88757d10" 2

"M:\SP4TP\sp4c12\SP4c1\SP4c1\ncrt0.a30" "0128987b88757d10" 2

[OPTIONS_Release_Renesas M32C C Compiler]

"C source file" "0128987b88757d10" 1

"M:\SP4TP\sp4c12\SP4c1\SP4c1\SP4c1.c" "0128987b88757d10" 1

[OPTIONS_Release_Renesas M32C Configurator]

"Single Shot" "0128987b88757d10" 6

[OPTIONS_Release_Renesas M32C Librarian]

"Single Shot" "0128987b88757d10" 5

[OPTIONS_Release_Renesas M32C Linker]

"Single Shot" "0128987b88757d10" 3

[OPTIONS_Release_Renesas M32C Stype Converter]

"Single Shot" "0128987b88757d10" 4

[OPTIONS_Release]

"" 0

"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON3] " 6

"[V|VERSION|1] [B|DATALENGTH|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] " 4

"[V|VERSION|1] [B|STARTUPLINK|1] [B|DEBUG|1] [B|MAP-S|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).x30^"] [S|INPUTLIBRARY|^"L=nc382lib^"] [S|CPU|M32C80] " 3

"[V|VERSION|1] [S|LIST|L|M] [B|INSPECTOR|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [S|CPU|M32C80] [B|HEAP|1] [S|DEFINE|__USTACKSIZE__=0300H] [S|DEFINE|__ISTACKSIZE__=0300H]" 2

"[V|VERSION|1] [S|MODE|CREATE|] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] " 5

"[V|VERSION|1] [S|OUTPUT|OBJECTCODE] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [B|INSPECTOR|1] [S|CPU|M32C80] " 1

[EXCLUDED_FILES_Release]

[LINKAGE_ORDER_Release]

"M:\SP4TP\sp4c12\SP4c1\SP4c1\Release\ncrt0.r30"

[GENERAL_DATA_CONFIGURATION_Release]

[GENERAL_DATA_CONFIGURATION_SESSION_Debug_DefaultSession]

[SESSION_DATA_CONFIGURATION_SESSION_Debug_DefaultSession]

"MEMORY_MAPPING_OPTIONS" ""

[GENERAL_DATA_CONFIGURATION_SESSION_Debug_SessionM32C_E8a_SYSTEM]

[SESSION_DATA_CONFIGURATION_SESSION_Debug_SessionM32C_E8a_SYSTEM]

"MEMORY_MAPPING_OPTIONS" "Unknown Options"

[GENERAL_DATA_CONFIGURATION_SESSION_Debug_SessionM32C_Simulator]

[SESSION_DATA_CONFIGURATION_SESSION_Debug_SessionM32C_Simulator]

"MEMORY_MAPPING_OPTIONS" "Unknown Options"

[GENERAL_DATA_CONFIGURATION_SESSION_Debug_M32C_E8a_SYSTEM_DefaultSession]

[SESSION_DATA_CONFIGURATION_SESSION_Debug_M32C_E8a_SYSTEM_DefaultSession]

"MEMORY_MAPPING_OPTIONS" ""

[GENERAL_DATA_CONFIGURATION_SESSION_Debug_M32C_E8a_SYSTEM_SessionM32C_E8a_SYSTEM]

[SESSION_DATA_CONFIGURATION_SESSION_Debug_M32C_E8a_SYSTEM_SessionM32C_E8a_SYSTEM]

"MEMORY_MAPPING_OPTIONS" "Unknown Options"

[GENERAL_DATA_CONFIGURATION_SESSION_Debug_M32C_E8a_SYSTEM_SessionM32C_Simulator]

[SESSION_DATA_CONFIGURATION_SESSION_Debug_M32C_E8a_SYSTEM_SessionM32C_Simulator]

"MEMORY_MAPPING_OPTIONS" "Unknown Options"

[GENERAL_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_DefaultSession]

[SESSION_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_DefaultSession]

"MEMORY_MAPPING_OPTIONS" ""

[GENERAL_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_SessionM32C_E8a_SYSTEM]

[SESSION_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_SessionM32C_E8a_SYSTEM]

"MEMORY_MAPPING_OPTIONS" "Unknown Options"

[GENERAL_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_SessionM32C_Simulator]

[SESSION_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_SessionM32C_Simulator]

"MEMORY_MAPPING_OPTIONS" "Unknown Options"

[GENERAL_DATA_CONFIGURATION_SESSION_Release_DefaultSession]

[SESSION_DATA_CONFIGURATION_SESSION_Release_DefaultSession]

"MEMORY_MAPPING_OPTIONS" ""

[GENERAL_DATA_CONFIGURATION_SESSION_Release_SessionM32C_E8a_SYSTEM]

[SESSION_DATA_CONFIGURATION_SESSION_Release_SessionM32C_E8a_SYSTEM]

"MEMORY_MAPPING_OPTIONS" "Unknown Options"

[GENERAL_DATA_CONFIGURATION_SESSION_Release_SessionM32C_Simulator]

[SESSION_DATA_CONFIGURATION_SESSION_Release_SessionM32C_Simulator]

"MEMORY_MAPPING_OPTIONS" "Unknown Options"

[EXT_DEBUGGER_INFO]

0 "" "" "" ""

[END]

[EMULATOR_SETTING]

HIDE_DIALOG=0

[RESET_RELEASE]

ENABLE=0

[CPU_SELECT]

DEVICE=M30879FL

EMUSEL=0

MCU_GROUP=M32C__87 Group

[POWER_SUPPLY]

VOLTAGE_5_0=0

VOLTAGE_3_3=0

[FW_LOCATE]

FWADDRESS=fff0

RAMADDRESS=c3

[WDT]

WDT_USE=0

[MCU_SETTING]

PROCESSOR_MODE=0

[COMMUNI]

COMSPEED=8

COMSPEED PROGRAM FLASH=8

COMSPEED DATA FLASH=8

[Driver Configuration]

Renesas Communications=USB interface,0,

[Target]

M32C E8a SYSTEM=Renesas Communications

[USER_DATA]

RESET=fe0000

/************************************************************************************

* *

* File name : sfr32c87.h *

* Contents : Definition of M32C/87 Group SFR *

* *

* Copyright, 2003 RENESAS TECHNOLOGY CORPORATION *

* AND RENESAS SOLUTIONS CORPORATION *

* *

* Note : *

* *

* Version : Ver 0.01 (04-09-23) Preliminary *

* These data made based on M32C/85 Group H/W Manual Rev.0.30 *

* Version : Ver 0.02 (04-12-02) Preliminary *

* Version : Ver 0.03 (04-12-22) Preliminary *

* Version : Ver 0.04 (05-12-08) Preliminary *

* Version : Ver 0.05 (06-01-23) Preliminary *

* *

*************************************************************************************/

/*

note:

This data is a freeware that SFR for M32C/87 group are described.

RENESAS TECHNOLOGY CORPORATION and RENESAS SOLUTIONS CORPORATION assume

no responsibility for any damage that occurred by this data.

*/

/************************************************************************

* declare SFR address *

************************************************************************/

#pragma ADDRESS pm0_addr 0004H /* Processor mode register 0 */

#pragma ADDRESS pm1_addr 0005H /* Processor mode register 1 */

#pragma ADDRESS cm0_addr 0006H /* System clock control register 0 */

#pragma ADDRESS cm1_addr 0007H /* System clock control register 1 */

#pragma ADDRESS aier_addr 0009H /* Address match interrupt enable register */

#pragma ADDRESS prcr_addr 000aH /* Protect register */

#pragma ADDRESS ds_addr 000bH /* External data bus width control register */

#pragma ADDRESS mcd_addr 000cH /* Main clock division register */

#pragma ADDRESS cm2_addr 000dH /* Oscillation stop detect register */

#pragma ADDRESS wdts_addr 000eH /* Watchdog timer start register */

#pragma ADDRESS wdc_addr 000fH /* Watchdog timer control register */

#pragma ADDRESS rmad0_addr 0010H /* Address match interrupt register 0 */

#pragma ADDRESS pm2_addr 0013H /* Processor mode register 2 */

#pragma ADDRESS rmad1_addr 0014H /* Address match interrupt register 1 */

#pragma ADDRESS vcr2_addr 0017H /* Voltage detection register 2 */

#pragma ADDRESS rmad2_addr 0018H /* Address match interrupt register 2 */

#pragma ADDRESS vcr1_addr 001bH /* Voltage detection register 1 */

#pragma ADDRESS rmad3_addr 001cH /* Address match interrupt register 3 */

#pragma ADDRESS plc_addr 0026H /* PLL control register */

#pragma ADDRESS plc0_addr 0026H /* PLL control register 0 */

#pragma ADDRESS plc1_addr 0027H /* PLL control register 1 */

#pragma ADDRESS rmad4_addr 0028H /* Address match interrupt register 4 */

#pragma ADDRESS rmad5_addr 002CH /* Address match interrupt register 5 */

#pragma ADDRESS d4int_addr 002FH /* Voltage down detect interrupt register */

#pragma ADDRESS rmad6_addr 0038H /* Address match interrupt register 6 */

#pragma ADDRESS rmad7_addr 003CH /* Address match interrupt register 7 */

#pragma ADDRESS ewcr0_addr 0048H /* External space wait control register 0 */

#pragma ADDRESS ewcr1_addr 0049H /* External space wait control register 1 */

#pragma ADDRESS ewcr2_addr 004AH /* External space wait control register 2 */

#pragma ADDRESS ewcr3_addr 004BH /* External space wait control register 3 */

#pragma ADDRESS fmr1_addr 0055H /* Flash Memory Control Register 1 */

#pragma ADDRESS fmr_addr 0057H /* Flash memory control register 0 */

#pragma ADDRESS fmr0_addr 0057H /* Flash memory control register 0 */

#pragma ADDRESS dm0ic_addr 0068H /* DMA0 interrupt control register */

#pragma ADDRESS tb5ic_addr 0069H /* Timer B5 interrupt register */

#pragma ADDRESS dm2ic_addr 006aH /* DMA2 interrupt register */

#pragma ADDRESS s2ric_addr 006bH /* UART2 receive/ack interrupt control register */

#pragma ADDRESS ta0ic_addr 006cH /* Timer A0 interrupt control register */

#pragma ADDRESS s3ric_addr 006dH /* UART3 receive/ack interrupt control register */

#pragma ADDRESS ta2ic_addr 006eH /* Timer A2 interrupt control register */

#pragma ADDRESS s4ric_addr 006fH /* UART4 receive/ack interrupt control register */

#pragma ADDRESS ta4ic_addr 0070H /* Timer A4 interrupt control register */

#pragma ADDRESS bcn0ic_addr 0071H /* Bus collision (UART0) interrupt control register */

#pragma ADDRESS bcn3ic_addr 0071H /* Bus collision (UART3) interrupt control register */

#pragma ADDRESS s0ric_addr 0072H /* UART0 receive interrupt control register */

#pragma ADDRESS ad0ic_addr 0073H /* A/D0 conversion interrupt control register */

#pragma ADDRESS s1ric_addr 0074H /* UART1 receive interrupt control register */

#pragma ADDRESS iio0ic_addr 0075H /* Intelligent I/O interrupt control register 0 */

#pragma ADDRESS can3ic_addr 0075H /* CAN interrupt 3 control register */

#pragma ADDRESS tb1ic_addr 0076H /* Timer B1 interrupt control register */

#pragma ADDRESS iio2ic_addr 0077H /* Intelligent I/O interrupt control register 2 */

#pragma ADDRESS tb3ic_addr 0078H /* Timer B3 interrupt control register */

#pragma ADDRESS iio4ic_addr 0079H /* Intelligent I/O interrupt control register 4 */

#pragma ADDRESS int5ic_addr 007aH /* INT5~ interrupt control register */

#pragma ADDRESS iio6ic_addr 007bH /* Intelligent I/O interrupt control register 6 */

#pragma ADDRESS int3ic_addr 007cH /* INT3~ interrupt control register */

#pragma ADDRESS iio8ic_addr 007dH /* Intelligent I/O interrupt control register 8 */

#pragma ADDRESS int1ic_addr 007eH /* INT1~ interrupt control register */

#pragma ADDRESS iio10ic_addr 007fH /* Intelligent I/O interrupt control register 10 */

#pragma ADDRESS can1ic_addr 007fH /* CAN Interrupt 1 Control Register */

#pragma ADDRESS iio11ic_addr 0081H /* Intelligent I/O interrupt control register 11 */

#pragma ADDRESS can2ic_addr 0081H /* CAN Interrupt 2 Control Register */

#pragma ADDRESS dm1ic_addr 0088H /* DMA1 interrupt control register */

#pragma ADDRESS s2tic_addr 0089H /* UART2 transmit/nack interrupt control register */

#pragma ADDRESS dm3ic_addr 008aH /* DMA3 interrupt control register */

#pragma ADDRESS s3tic_addr 008bH /* UART3 transmit/nack interrupt control register */

#pragma ADDRESS ta1ic_addr 008cH /* Timer A1 interrupt control register */

#pragma ADDRESS s4tic_addr 008dH /* UART4 transmit/nack interrupt control register */

#pragma ADDRESS ta3ic_addr 008eH /* Timer A3 interrupt control register */

#pragma ADDRESS bcn2ic_addr 008fH /* Bus collision (UART2) interrupt control register */

#pragma ADDRESS s0tic_addr 0090H /* UART0 transmit interrupt control register */

#pragma ADDRESS bcn1ic_addr 0091H /* Bus collision (UART1) interrupt control register*/

#pragma ADDRESS bcn4ic_addr 0091H /* Bus collision (UART4) interrupt control register */

#pragma ADDRESS s1tic_addr 0092H /* UART1 transmit interrupt control register */

#pragma ADDRESS kupic_addr 0093H /* Key input interrupt control register */

#pragma ADDRESS tb0ic_addr 0094H /* Timer B0 interrupt control register */

#pragma ADDRESS iio1ic_addr 0095H /* Intelligent I/O interrupt control register 1 */

#pragma ADDRESS can4ic_addr 0095H /* CAN Interrupt 4 Control Register */

#pragma ADDRESS tb2ic_addr 0096H /* Timer B2 interrupt control register */

#pragma ADDRESS iio3ic_addr 0097H /* Intelligent I/O interrupt control register 3 */

#pragma ADDRESS tb4ic_addr 0098H /* Timer B4 interrupt control register */

#pragma ADDRESS iio5ic_addr 0099H /* Intelligent I/O interrupt control register 5 */

#pragma ADDRESS can5ic_addr 0099H /* CAN Interrupt 5 Control Register */

#pragma ADDRESS int4ic_addr 009aH /* INT4~ interrupt control register */

#pragma ADDRESS iio7ic_addr 009bH /* Intelligent I/O interrupt control register 7 */

#pragma ADDRESS int2ic_addr 009cH /* INT2~ interrupt control register */

#pragma ADDRESS iio9ic_addr 009dH /* Intelligent I/O interrupt control register 9 */

#pragma ADDRESS can0ic_addr 009dH /* CAN0 Interrupt Control Register*/

#pragma ADDRESS int0ic_addr 009eH /* INT0~ interrupt control register */

#pragma ADDRESS rlvl_addr 009fH /* Exit priority register */

#pragma ADDRESS iio0ir_addr 00a0H /* Interrupt request register 0 */

#pragma ADDRESS iio1ir_addr 00a1H /* Interrupt request register 1 */

#pragma ADDRESS iio2ir_addr 00a2H /* Interrupt request register 2 */

#pragma ADDRESS iio3ir_addr 00a3H /* Interrupt request register 3 */

#pragma ADDRESS iio4ir_addr 00a4H /* Interrupt request register 4 */

#pragma ADDRESS iio5ir_addr 00a5H /* Interrupt request register 5 */

#pragma ADDRESS iio6ir_addr 00a6H /* Interrupt request register 6 */

#pragma ADDRESS iio7ir_addr 00a7H /* Interrupt request register 7 */

#pragma ADDRESS iio8ir_addr 00a8H /* Interrupt request register 8 */

#pragma ADDRESS iio9ir_addr 00a9H /* Interrupt request register 9 */

#pragma ADDRESS iio10ir_addr 00aaH /* Interrupt request register 10 */

#pragma ADDRESS iio11ir_addr 00abH /* Interrupt request register 11 */

#pragma ADDRESS iio0ie_addr 00b0H /* Interrupt enable register 0 */

#pragma ADDRESS iio1ie_addr 00b1H /* Interrupt enable register 1 */

#pragma ADDRESS iio2ie_addr 00b2H /* Interrupt enable register 2 */

#pragma ADDRESS iio3ie_addr 00b3H /* Interrupt enable register 3 */

#pragma ADDRESS iio4ie_addr 00b4H /* Interrupt enable register 4 */

#pragma ADDRESS iio5ie_addr 00b5H /* Interrupt enable register 5 */

#pragma ADDRESS iio6ie_addr 00b6H /* Interrupt enable register 6 */

#pragma ADDRESS iio7ie_addr 00b7H /* Interrupt enable register 7 */

#pragma ADDRESS iio8ie_addr 00b8H /* Interrupt enable register 8 */

#pragma ADDRESS iio9ie_addr 00b9H /* Interrupt enable register 9 */

#pragma ADDRESS iio10ie_addr 00baH /* Interrupt enable register 10 */

#pragma ADDRESS iio11ie_addr 00bbH /* Interrupt enable register 11 */

#pragma ADDRESS g0rb_addr 00e8H /* SI/O receive buffer register 0 */

#pragma ADDRESS g0tb_addr 00eaH /* Transmit buffer register 0 */

#pragma ADDRESS g0dr_addr 00eaH /* Receive data register 0 */

#pragma ADDRESS g0ri_addr 00ecH /* Receive input register 0 */

#pragma ADDRESS g0mr_addr 00edH /* SI/O communication control register 0 */

#pragma ADDRESS g0to_addr 00eeH /* Transmit output register 0 */

#pragma ADDRESS g0cr_addr 00efH /* SI/O communication control register 0 */

#pragma ADDRESS g0cmp0_addr 00f0H /* Data compare register 00 */

#pragma ADDRESS g0cmp1_addr 00f1H /* Data compare register 01 */

#pragma ADDRESS g0cmp2_addr 00f2H /* Data compare register 02 */

#pragma ADDRESS g0cmp3_addr 00f3H /* Data compare register 03 */

#pragma ADDRESS g0msk0_addr 00f4H /* Data mask register 00 */

#pragma ADDRESS g0msk1_addr 00f5H /* Data mask register 01 */

#pragma ADDRESS ccs_addr 00f6H /* Communication clock select register */

#pragma ADDRESS g0rcrc_addr 00f8H /* Receive CRC code register 0 */

#pragma ADDRESS g0tcrc_addr 00faH /* Transmit CRC code register 0 */

#pragma ADDRESS g0emr_addr 00fcH /* SI/O expansion mode register 0 */

#pragma ADDRESS g0erc_addr 00fdH /* SI/O expansion receive control register 0 */

#pragma ADDRESS g0irf_addr 00feH /* SI/O special communication interrupt detect register 0 */

#pragma ADDRESS g0etc_addr 00ffH /* SI/O expansion transmit control register 0 */

#pragma ADDRESS g1tm0_addr 0100H /* Time measurement register 10 */

#pragma ADDRESS g1po0_addr 0100H /* Waveform generate register 10 */

#pragma ADDRESS g1tm1_addr 0102H /* Time measurement register 11 */

#pragma ADDRESS g1po1_addr 0102H /* Waveform generate register 11 */

#pragma ADDRESS g1tm2_addr 0104H /* Time measurement register 12 */

#pragma ADDRESS g1po2_addr 0104H /* Waveform generate register 12 */

#pragma ADDRESS g1tm3_addr 0106H /* Time measurement register 13 */

#pragma ADDRESS g1po3_addr 0106H /* Waveform generate register 13 */

#pragma ADDRESS g1tm4_addr 0108H /* Time measurement register 14 */

#pragma ADDRESS g1po4_addr 0108H /* Waveform generate register 14 */

#pragma ADDRESS g1tm5_addr 010aH /* Time measurement register 15 */

#pragma ADDRESS g1po5_addr 010aH /* Waveform generate register 15 */

#pragma ADDRESS g1tm6_addr 010cH /* Time measurement register 16 */

#pragma ADDRESS g1po6_addr 010cH /* Waveform generate register 16 */

#pragma ADDRESS g1tm7_addr 010eH /* Time measurement register 17 */

#pragma ADDRESS g1po7_addr 010eH /* Waveform generate register 17 */

#pragma ADDRESS g1pocr0_addr 0110H /* Waveform generate control register 10 */

#pragma ADDRESS g1pocr1_addr 0111H /* Waveform generate control register 11 */

#pragma ADDRESS g1pocr2_addr 0112H /* Waveform generate control register 12 */

#pragma ADDRESS g1pocr3_addr 0113H /* Waveform generate control register 13 */

#pragma ADDRESS g1pocr4_addr 0114H /* Waveform generate control register 14 */

#pragma ADDRESS g1pocr5_addr 0115H /* Waveform generate control register 15 */

#pragma ADDRESS g1pocr6_addr 0116H /* Waveform generate control register 16 */

#pragma ADDRESS g1pocr7_addr 0117H /* Waveform generate control register 17 */

#pragma ADDRESS g1tmcr0_addr 0118H /* Time measurement control register 10 */

#pragma ADDRESS g1tmcr1_addr 0119H /* Time measurement control register 11 */

#pragma ADDRESS g1tmcr2_addr 011aH /* Time measurement control register 12 */

#pragma ADDRESS g1tmcr3_addr 011bH /* Time measurement control register 13 */

#pragma ADDRESS g1tmcr4_addr 011cH /* Time measurement control register 14 */

#pragma ADDRESS g1tmcr5_addr 011dH /* Time measurement control register 15 */

#pragma ADDRESS g1tmcr6_addr 011eH /* Time measurement control register 16 */

#pragma ADDRESS g1tmcr7_addr 011fH /* Time measurement control register 17 */

#pragma ADDRESS g1bt_addr 0120H /* Base timer register 1 */

#pragma ADDRESS g1bcr0_addr 0122H /* Base timer control register 10 */

#pragma ADDRESS g1bcr1_addr 0123H /* Base timer control register 11 */

#pragma ADDRESS g1tpr6_addr 0124H /* Time measurement prescaler register 16 */

#pragma ADDRESS g1tpr7_addr 0125H /* Time measurement prescaler register 17 */

#pragma ADDRESS g1fe_addr 0126H /* Function enable register 1 */