Révision 778
Ajouté par Romain CHAMBELLON il y a presque 4 ans
| uart0.c | ||
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void uart0_init(void)
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void uart0_init(void) {
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void uart0_tx(char c)?
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ILVL0 = 0; // interrupt disabled
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ILVL1 = 0;
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ILVL2 = 0;
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// UiMR register p240
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smd2_u0mr = 1;
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smd1_u0mr = 0;
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smd0_u0mr = 1;
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ckdir_u0mr = 0;
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stps_u0mr = 0
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pry_u0mr = 0;
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prye_u0mr = 0;
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iopol_u0mr = 0;
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// UiSMR register p241
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u0smr = 00h;
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u0smr2 = 00h;
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u0smr3 = 00h;
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u0smr4 = 00h;
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//UiC0 register p245
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clk1_u0c0 = 0;
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clk0_u0c0 = 1;
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crs_u0c0 = 0;
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crd_u0c0 = 1;
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nch_u0c0 = 0;
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ckpol_u0c0 = 0;
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uform_u0c0 = 0;
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// UiBRG register p246
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u0brg = 1Fh;
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//Uic1 register p246
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te_u0c1 = 0;
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re_u0c1 = 0;
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u0irs_u0c1 = 1;
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u0rrm_u0c1 = 0;
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u0lch_u0c1 = 0;
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b7_u0c1 = 0;
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//SiTIC register p138
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ilvl2_s0tic = 0;
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ilvl1_s0tic = 0;
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ilvl0_s0tic = 0;
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ir_s0tic = 0;
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//SiRIC register p138
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ilvl2_s0ric = 0;
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ilvl1_s0ric = 0;
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ilvl0_s0ric = 0;
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ir_s0ric = 0;
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}
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void uart0_tx(char c)?{
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}
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char uart0_rx(void)
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Formats disponibles : Unified diff
Fin séance TPsp4c1