Révision 790
Ajouté par jcguifodjo il y a presque 4 ans
| branch/GUIFO/sp4c12/TPC/TPC/TPC.c | ||
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/* This file is generated by Renesas Project Generator (Ver.4.18). */
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/* NOTE:THIS IS A TYPICAL EXAMPLE. */
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/***********************************************************************/
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#include "sfr32c87.h"
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#include "sfr32c87.h"
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void uart0_init(void)
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{
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pd6 = 0xFB;
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u0mr = 0x75;
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u0c0 = 0xd0;
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u0brg = 255;
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u0c1 = 0x18;
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//Initialisation des ports
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//CTS entree
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pd6_0 = 0;
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ps0_0 = 0;
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//RTS sortie
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ps0_0 = 1;
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//CLK Entree
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pd6_1 = 0;
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ps0_1 = 0;
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//entree RX
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pd6_2 = 0;
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ps0_2 = 0;
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// sortie TX
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ps0_3 = 1;
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//Configuration du registre u0mr
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smd0_u0mr = 1;
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smd1_u0mr = 0;
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smd2_u0mr = 1;
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ckdir_u0mr = 0;
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stps_u0mr = 0;
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prye_u0mr = 0;
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iopol_u0mr = 0;
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//configuration du rgistre U0SMR
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u0smr = 0x00;
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u0smr2 = 0x00;
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u0smr3 = 0x00;
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u0smr4 = 0x00;
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//Configuration du registre u0c0
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clk0_u0c0 = 0;
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clk1_u0c0 = 0;
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crs_u0c0 = 1;
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crd_u0c0 = 1;
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nch_u0c0 = 0;
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ckpol_u0c0 = 0;
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uform_u0c0 0;
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//definition du u0brg
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u0brg = 0xFF;
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//Configuration du registre u0c1
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te_u0c1 = 0;
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re_u0c1 = 0;
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u0rrm_u0c1 = 0;
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u0lch_u0c1 = 0;
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sclkstpb_u0c1 = 0;
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//Configuration des registres s0tic et s0ric
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s0tic = 0x00;
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s0ric = 0x00;
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u0c1 = 0x1d;
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}
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uart0_tx(char c)
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void uart0_tx(char c)
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{
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u0c1 = 0x1f;
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pd6_0=0;
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p6_3=1;
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u0c0 = 0xd8;
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s0tic = 0x08;
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crd_u0c0 = 1;
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crs_u0c0 = 0;
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te_u0c1 = 1;
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u0tb = c;
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te_u0c1 = 0;
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}
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char uart0_rx()
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{
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char c;
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crd_u0c0 = 1;
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crs_u0c0 = 0;
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re_u0c1 = 1;
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c= u0rb;
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return c;
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}
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void main(void)
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{
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char c='A';
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uart0_init();
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while (1){
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uart0_tx(c);
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}
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}
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/*void main(void)
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{
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char alpha;
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uart0_init();
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while (1){
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for(alpha = 'A' ; alpha <= 'Z' ; alpha++)
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{
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uart0_tx(alpha);
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}
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}
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}*/
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Formats disponibles : Unified diff
écriture des fonctions uart0_tx et uart0_rx