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/***********************************************************************/
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/* */
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/* FILE :Uart.c */
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/* DATE :Thu, Jun 03, 2021 */
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/* DESCRIPTION :main program file. */
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/* CPU GROUP :87B */
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/* */
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/* This file is generated by Renesas Project Generator (Ver.4.18). */
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/* NOTE:THIS IS A TYPICAL EXAMPLE. */
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/***********************************************************************/
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#include "sfr32c87.h"
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#pragma INTERRUPT 18 irectrame
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void uart0_init(void);
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void uart0_tx(char c);
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char uart0_rx(void);
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int trame_OK=0;
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void main(void)
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{
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char lettre;
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int i=0;
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uart0_init();
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while(1)
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{
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for(lettre='A';lettre<='Z';(int)lettre++ )
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{
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uart0_tx(lettre);
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for (i=0; i<10000; i++)
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{
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}
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}
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}
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}
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void uart0_init(void)
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{
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pd6_1=0;
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pd6_2=0;
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ps0_1=0;
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ps0_2=0;
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ps0_3=1;
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//UART Mode
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smd0_u0mr =1;
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smd1_u0mr =0;
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smd2_u0mr =1;
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ckdir_u0mr=0;
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stps_u0mr =0;
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//pry_u0mr =0;
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prye_u0mr =0;
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iopol_u0mr=0;
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//UART Special Mode
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u0smr =0x00;
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u0smr2=0x00;
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u0smr3=0x00;
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u0smr4=0x00;
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//UART Transmit/Receive Control Register 0
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clk0_u0c0 =1;
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clk1_u0c0 =0;
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crs_u0c0 =0;
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crd_u0c0 =0;
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nch_u0c0 =0;
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ckpol_u0c0=0;
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uform_u0c0=0;
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//Baud Rate
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u0brg = 0x20;
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//UART Transmit/Receive Control Register 1
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te_u0c1 =0;
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re_u0c1 =0;
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/*u0irs_u0c1 =1;
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u0rrm_u0c1 =0;
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u0lch_u0c1 =0;
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sclkstpb_u0c1=0;*/
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}
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void uart0_tx(char c)
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{
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crd_u0c0=1;
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crs_u0c0=0;
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te_u0c1=1;
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u0tb =c;
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te_u0c1=0;
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}
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char uart0_rx(void)
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{
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char c;
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while(!ri_u0c1);
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c=u0rb;
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}
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